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-rw-r--r--hw/bsp/lpc17/boards/lpcxpresso1769/lpc1769.ld40
-rw-r--r--hw/bsp/lpc17/boards/mbed1768/lpc1768.ld40
-rw-r--r--hw/bsp/lpc17/family.cmake75
-rw-r--r--hw/bsp/nrf/family.cmake4
4 files changed, 96 insertions, 63 deletions
diff --git a/hw/bsp/lpc17/boards/lpcxpresso1769/lpc1769.ld b/hw/bsp/lpc17/boards/lpcxpresso1769/lpc1769.ld
index 095bd3d92..ba0543f09 100644
--- a/hw/bsp/lpc17/boards/lpcxpresso1769/lpc1769.ld
+++ b/hw/bsp/lpc17/boards/lpcxpresso1769/lpc1769.ld
@@ -140,7 +140,7 @@ SECTIONS
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
- PROVIDE(end = .);
+/* PROVIDE(end = .);*/
} > RamLoc32
/* NOINIT section for RamAHB32 */
@@ -159,19 +159,37 @@ SECTIONS
. = ALIGN(4) ;
_end_noinit = .;
} > RamLoc32
- PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
+
+ /* hathach add heap section for clang */
+ .heap (NOLOAD): {
+ __heap_start = .;
+ __HeapBase = .;
+ __heap_base = .;
+ __end = .;
+ PROVIDE(end = .);
+ PROVIDE(_end = .);
+ PROVIDE(__end__ = .);
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ __heap_limit = .;
+ __heap_end = .;
+ } > RamLoc32
+
+/* PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);*/
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
/* ## Create checksum value (used in startup) ## */
- PROVIDE(__valid_user_code_checksum = 0 -
- (_vStackTop
- + (ResetISR + 1)
- + (NMI_Handler + 1)
- + (HardFault_Handler + 1)
- + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
- + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
- + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
- ) );
+ /* This cause issue with clang linker, so it is disabled */
+ /* MemManage_Handler, BusFault_Handler, UsageFault_Handler may not be defined */
+/* PROVIDE(__valid_user_code_checksum = 0 -*/
+/* (_vStackTop*/
+/* + (ResetISR + 1)*/
+/* + (NMI_Handler + 1)*/
+/* + (HardFault_Handler + 1)*/
+/* + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)*/
+/* + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)*/
+/* + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1)*/
+/* ) );*/
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
diff --git a/hw/bsp/lpc17/boards/mbed1768/lpc1768.ld b/hw/bsp/lpc17/boards/mbed1768/lpc1768.ld
index 095bd3d92..ba0543f09 100644
--- a/hw/bsp/lpc17/boards/mbed1768/lpc1768.ld
+++ b/hw/bsp/lpc17/boards/mbed1768/lpc1768.ld
@@ -140,7 +140,7 @@ SECTIONS
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
- PROVIDE(end = .);
+/* PROVIDE(end = .);*/
} > RamLoc32
/* NOINIT section for RamAHB32 */
@@ -159,19 +159,37 @@ SECTIONS
. = ALIGN(4) ;
_end_noinit = .;
} > RamLoc32
- PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
+
+ /* hathach add heap section for clang */
+ .heap (NOLOAD): {
+ __heap_start = .;
+ __HeapBase = .;
+ __heap_base = .;
+ __end = .;
+ PROVIDE(end = .);
+ PROVIDE(_end = .);
+ PROVIDE(__end__ = .);
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ __heap_limit = .;
+ __heap_end = .;
+ } > RamLoc32
+
+/* PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);*/
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
/* ## Create checksum value (used in startup) ## */
- PROVIDE(__valid_user_code_checksum = 0 -
- (_vStackTop
- + (ResetISR + 1)
- + (NMI_Handler + 1)
- + (HardFault_Handler + 1)
- + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
- + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
- + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
- ) );
+ /* This cause issue with clang linker, so it is disabled */
+ /* MemManage_Handler, BusFault_Handler, UsageFault_Handler may not be defined */
+/* PROVIDE(__valid_user_code_checksum = 0 -*/
+/* (_vStackTop*/
+/* + (ResetISR + 1)*/
+/* + (NMI_Handler + 1)*/
+/* + (HardFault_Handler + 1)*/
+/* + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)*/
+/* + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)*/
+/* + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1)*/
+/* ) );*/
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
diff --git a/hw/bsp/lpc17/family.cmake b/hw/bsp/lpc17/family.cmake
index 63ac3149c..cccfdac9f 100644
--- a/hw/bsp/lpc17/family.cmake
+++ b/hw/bsp/lpc17/family.cmake
@@ -1,10 +1,7 @@
include_guard()
-if (NOT BOARD)
- message(FATAL_ERROR "BOARD not specified")
-endif ()
-
set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
@@ -21,42 +18,46 @@ set(FAMILY_MCUS LPC175X_6X CACHE INTERNAL "")
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
- if (NOT TARGET ${BOARD_TARGET})
- add_library(${BOARD_TARGET} STATIC
- ${SDK_DIR}/../gcc/cr_startup_lpc175x_6x.c
- ${SDK_DIR}/src/chip_17xx_40xx.c
- ${SDK_DIR}/src/clock_17xx_40xx.c
- ${SDK_DIR}/src/gpio_17xx_40xx.c
- ${SDK_DIR}/src/iocon_17xx_40xx.c
- ${SDK_DIR}/src/sysctl_17xx_40xx.c
- ${SDK_DIR}/src/sysinit_17xx_40xx.c
- ${SDK_DIR}/src/uart_17xx_40xx.c
- )
- target_compile_options(${BOARD_TARGET} PUBLIC
- -nostdlib
+ if (TARGET ${BOARD_TARGET})
+ return()
+ endif ()
+
+ add_library(${BOARD_TARGET} STATIC
+ ${SDK_DIR}/../gcc/cr_startup_lpc175x_6x.c
+ ${SDK_DIR}/src/chip_17xx_40xx.c
+ ${SDK_DIR}/src/clock_17xx_40xx.c
+ ${SDK_DIR}/src/gpio_17xx_40xx.c
+ ${SDK_DIR}/src/iocon_17xx_40xx.c
+ ${SDK_DIR}/src/sysctl_17xx_40xx.c
+ ${SDK_DIR}/src/sysinit_17xx_40xx.c
+ ${SDK_DIR}/src/uart_17xx_40xx.c
+ )
+ target_compile_definitions(${BOARD_TARGET} PUBLIC
+ __USE_LPCOPEN
+ CORE_M3
+ RTC_EV_SUPPORT=0
+ )
+ target_include_directories(${BOARD_TARGET} PUBLIC
+ ${SDK_DIR}/inc
+ ${CMSIS_DIR}/CMSIS/Core/Include
+ )
+
+ update_board(${BOARD_TARGET})
+
+ if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+ target_compile_options(${BOARD_TARGET} PUBLIC -nostdlib)
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--script=${LD_FILE_GNU}"
+ --specs=nosys.specs --specs=nano.specs
)
- target_compile_definitions(${BOARD_TARGET} PUBLIC
- __USE_LPCOPEN
- CORE_M3
- RTC_EV_SUPPORT=0
+ elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--script=${LD_FILE_GNU}"
)
- target_include_directories(${BOARD_TARGET} PUBLIC
- ${SDK_DIR}/inc
+ elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--config=${LD_FILE_IAR}"
)
-
- update_board(${BOARD_TARGET})
-
- if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
- target_link_options(${BOARD_TARGET} PUBLIC
- "LINKER:--script=${LD_FILE_GNU}"
- # nanolib
- --specs=nosys.specs --specs=nano.specs
- )
- elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
- target_link_options(${BOARD_TARGET} PUBLIC
- "LINKER:--config=${LD_FILE_IAR}"
- )
- endif ()
endif ()
endfunction()
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index b2cd926f9..5de69a8a3 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -1,9 +1,5 @@
include_guard()
-if (NOT BOARD)
- message(FATAL_ERROR "BOARD not specified")
-endif ()
-
set(NRFX_DIR ${TOP}/hw/mcu/nordic/nrfx)
set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-17 23:16:34 +0000