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-rw-r--r--.gitmodules3
-rw-r--r--CONTRIBUTORS.md4
-rw-r--r--README.md1
-rw-r--r--docs/boards.md8
-rw-r--r--hw/bsp/nutiny_nuc121s/board.mk55
-rw-r--r--hw/bsp/nutiny_nuc121s/nuc121_flash.ld195
-rw-r--r--hw/bsp/nutiny_nuc121s/nutiny_nuc121.c102
-rw-r--r--hw/bsp/nutiny_nuc125s/board.mk38
-rw-r--r--hw/bsp/nutiny_nuc125s/nuc125_flash.ld195
-rw-r--r--hw/bsp/nutiny_nuc125s/nutiny_nuc125.c102
-rw-r--r--hw/bsp/nutiny_nuc126v/board.mk59
-rw-r--r--hw/bsp/nutiny_nuc126v/nuc126_flash.ld195
-rw-r--r--hw/bsp/nutiny_nuc126v/nutiny_nuc126.c133
m---------hw/mcu/nuvoton0
-rw-r--r--src/portable/nuvoton/nuc121/dcd_nuc121.c434
-rw-r--r--src/tusb_option.h3
16 files changed, 1526 insertions, 1 deletions
diff --git a/.gitmodules b/.gitmodules
index 83db9dfff..18b627bcf 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -19,3 +19,6 @@
[submodule "hw/mcu/microchip"]
path = hw/mcu/microchip
url = https://github.com/hathach/microchip_driver.git
+[submodule "hw/mcu/nuvoton"]
+ path = hw/mcu/nuvoton
+ url = https://github.com/majbthrd/nuc_driver.git \ No newline at end of file
diff --git a/CONTRIBUTORS.md b/CONTRIBUTORS.md
index 20f4d9e26..0b52c4c5b 100644
--- a/CONTRIBUTORS.md
+++ b/CONTRIBUTORS.md
@@ -23,6 +23,10 @@
* USBTMC class driver support with example
* Various improvement e.g Zero-length packet, Lint setup
* Board support for STM32F070RB Nucleo, STM32F303 Discovery
+
+* **[Peter Lawrence](https://github.com/majbthrd)**
+ * Nuvoton NUC 121, 125, 126 device driver port
+ * Board support for NuTiny NUC121s, NUC125s, NUC126V
* **[Scott Shawcroft](https://github.com/tannewt)**
* SAMD21 and SAMD51 device driver port
diff --git a/README.md b/README.md
index eccb7627d..b85b60025 100644
--- a/README.md
+++ b/README.md
@@ -38,6 +38,7 @@ The stack supports the following MCUs
- **Sony:** CXD56
- **ST:** STM32 series: L0, F0, F1, F2, F3, F4, F7, H7 (device only)
- **[ValentyUSB](https://github.com/im-tomu/valentyusb)** eptri
+- **Nuvoton:** NUC121/NUC125, NUC126
[Here is the list of supported Boards](docs/boards.md) that can be used with provided examples.
diff --git a/docs/boards.md b/docs/boards.md
index 7006aae5d..399278e52 100644
--- a/docs/boards.md
+++ b/docs/boards.md
@@ -7,7 +7,7 @@ The board support code is only used for self-contained examples and testing. It
## Supported Boards
-This code base already had supported for a handful of following boards
+This code base already had supported for a handful of following boards (sorted alphabetically)
### MicroChip SAMD
@@ -26,6 +26,12 @@ This code base already had supported for a handful of following boards
- [Nordic nRF52840 Dongle (aka pca10059)](https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-Dongle)
- [Nordic nRF52833 Development Kit (aka pca10100)](https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52833-DK)
+### Nuvoton
+
+- [NuTiny NUC121S](https://direct.nuvoton.com/en/nutiny-nuc121s)
+- [NuTiny NUC125S](https://direct.nuvoton.com/en/nutiny-nuc125s)
+- [NuTiny NUC126V](https://direct.nuvoton.com/en/nutiny-nuc126v)
+
### NXP iMX RT
- [MIMX RT1010 Evaluation Kit](https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1010-evaluation-kit:MIMXRT1010-EVK)
diff --git a/hw/bsp/nutiny_nuc121s/board.mk b/hw/bsp/nutiny_nuc121s/board.mk
new file mode 100644
index 000000000..ec4966cb0
--- /dev/null
+++ b/hw/bsp/nutiny_nuc121s/board.mk
@@ -0,0 +1,55 @@
+CFLAGS += \
+ -flto \
+ -mthumb \
+ -mabi=aapcs-linux \
+ -mcpu=cortex-m0 \
+ -D__ARM_FEATURE_DSP=0 \
+ -DUSE_ASSERT=0 \
+ -DCFG_EXAMPLE_MSC_READONLY \
+ -DCFG_TUSB_MCU=OPT_MCU_NUC121
+
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/nutiny_nuc121s/nuc121_flash.ld
+
+SRC_C += \
+ hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/system_NUC121.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/adc.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/bpwm.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/clk.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/fmc.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/gpio.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/i2c.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/pdma.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/pwm.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/spi_i2s.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/sys.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/timer.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/uart.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/usbd.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/usci_i2c.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/usci_spi.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/usci_uart.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/wdt.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/wwdt.c
+
+SRC_S += \
+ hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/GCC/startup_NUC121.S
+
+INC += \
+ $(TOP)/hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Include \
+ $(TOP)/hw/mcu/nuvoton/nuc121_125/StdDriver/inc \
+ $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include
+
+# For TinyUSB port source
+VENDOR = nuvoton
+CHIP_FAMILY = nuc121
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM0
+
+# For flash-jlink target
+JLINK_DEVICE = NUC121SC2AE
+JLINK_IF = swd
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/nutiny_nuc121s/nuc121_flash.ld b/hw/bsp/nutiny_nuc121s/nuc121_flash.ld
new file mode 100644
index 000000000..3966b276e
--- /dev/null
+++ b/hw/bsp/nutiny_nuc121s/nuc121_flash.ld
@@ -0,0 +1,195 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x8000 /* 32k */
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x2000 /* 8k */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __copy_table_start__
+ * __copy_table_end__
+ * __zero_table_start__
+ * __zero_table_end__
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __end__
+ * end
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ * __Vectors_End
+ * __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors))
+ __Vectors_End = .;
+ __Vectors_Size = __Vectors_End - __Vectors;
+ __end__ = .;
+
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ /* To copy multiple ROM to RAM sections,
+ * uncomment .copy.table section and,
+ * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .copy.table :
+ {
+ . = ALIGN(4);
+ __copy_table_start__ = .;
+ LONG (__etext)
+ LONG (__data_start__)
+ LONG (__data_end__ - __data_start__)
+ LONG (__etext2)
+ LONG (__data2_start__)
+ LONG (__data2_end__ - __data2_start__)
+ __copy_table_end__ = .;
+ } > FLASH
+ */
+
+ /* To clear multiple BSS sections,
+ * uncomment .zero.table section and,
+ * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .zero.table :
+ {
+ . = ALIGN(4);
+ __zero_table_start__ = .;
+ LONG (__bss_start__)
+ LONG (__bss_end__ - __bss_start__)
+ LONG (__bss2_start__)
+ LONG (__bss2_end__ - __bss2_start__)
+ __zero_table_end__ = .;
+ } > FLASH
+ */
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ end = __end__;
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c b/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
new file mode 100644
index 000000000..51ca28a82
--- /dev/null
+++ b/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
@@ -0,0 +1,102 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board.h"
+#include "NuMicro.h"
+#include "clk.h"
+#include "sys.h"
+
+void board_init(void)
+{
+ /* Unlock protected registers */
+ SYS_UnlockReg();
+
+ /*---------------------------------------------------------------------------------------------------------*/
+ /* Init System Clock */
+ /*---------------------------------------------------------------------------------------------------------*/
+
+ /* Enable Internal HIRC 48 MHz clock */
+ CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN);
+
+ /* Waiting for Internal RC clock ready */
+ CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
+
+ /* Switch HCLK clock source to Internal HIRC and HCLK source divide 1 */
+ CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
+
+ /* Enable module clock */
+ CLK_EnableModuleClock(USBD_MODULE);
+
+ /* Select module clock source */
+ CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC, CLK_CLKDIV0_USB(1));
+
+ /* Enable module clock */
+ CLK_EnableModuleClock(USBD_MODULE);
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+ // 1ms tick timer
+ SysTick_Config(48000000 / 1000);
+#endif
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+ system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+ return system_ticks;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+ (void)(state);
+}
+
+uint32_t board_button_read(void)
+{
+ return 0;
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+ (void) buf; (void) len;
+ return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+ (void) buf; (void) len;
+ return 0;
+}
diff --git a/hw/bsp/nutiny_nuc125s/board.mk b/hw/bsp/nutiny_nuc125s/board.mk
new file mode 100644
index 000000000..6329ca7cf
--- /dev/null
+++ b/hw/bsp/nutiny_nuc125s/board.mk
@@ -0,0 +1,38 @@
+CFLAGS += \
+ -flto \
+ -mthumb \
+ -mabi=aapcs-linux \
+ -mcpu=cortex-m0 \
+ -D__ARM_FEATURE_DSP=0 \
+ -DUSE_ASSERT=0 \
+ -DCFG_EXAMPLE_MSC_READONLY \
+ -DCFG_TUSB_MCU=OPT_MCU_NUC121
+
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/nutiny_nuc125s/nuc125_flash.ld
+
+SRC_C += \
+ hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/system_NUC121.c \
+ hw/mcu/nuvoton/nuc121_125/StdDriver/src/clk.c
+
+SRC_S += \
+ hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/GCC/startup_NUC121.S
+
+INC += \
+ $(TOP)/hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Include \
+ $(TOP)/hw/mcu/nuvoton/nuc121_125/StdDriver/inc \
+ $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include
+
+# For TinyUSB port source
+VENDOR = nuvoton
+CHIP_FAMILY = nuc121
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM0
+
+# For flash-jlink target
+JLINK_DEVICE = NUC125SC2AE
+JLINK_IF = swd
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/nutiny_nuc125s/nuc125_flash.ld b/hw/bsp/nutiny_nuc125s/nuc125_flash.ld
new file mode 100644
index 000000000..3966b276e
--- /dev/null
+++ b/hw/bsp/nutiny_nuc125s/nuc125_flash.ld
@@ -0,0 +1,195 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x8000 /* 32k */
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x2000 /* 8k */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __copy_table_start__
+ * __copy_table_end__
+ * __zero_table_start__
+ * __zero_table_end__
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __end__
+ * end
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ * __Vectors_End
+ * __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors))
+ __Vectors_End = .;
+ __Vectors_Size = __Vectors_End - __Vectors;
+ __end__ = .;
+
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ /* To copy multiple ROM to RAM sections,
+ * uncomment .copy.table section and,
+ * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .copy.table :
+ {
+ . = ALIGN(4);
+ __copy_table_start__ = .;
+ LONG (__etext)
+ LONG (__data_start__)
+ LONG (__data_end__ - __data_start__)
+ LONG (__etext2)
+ LONG (__data2_start__)
+ LONG (__data2_end__ - __data2_start__)
+ __copy_table_end__ = .;
+ } > FLASH
+ */
+
+ /* To clear multiple BSS sections,
+ * uncomment .zero.table section and,
+ * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .zero.table :
+ {
+ . = ALIGN(4);
+ __zero_table_start__ = .;
+ LONG (__bss_start__)
+ LONG (__bss_end__ - __bss_start__)
+ LONG (__bss2_start__)
+ LONG (__bss2_end__ - __bss2_start__)
+ __zero_table_end__ = .;
+ } > FLASH
+ */
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ end = __end__;
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c b/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
new file mode 100644
index 000000000..51ca28a82
--- /dev/null
+++ b/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
@@ -0,0 +1,102 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board.h"
+#include "NuMicro.h"
+#include "clk.h"
+#include "sys.h"
+
+void board_init(void)
+{
+ /* Unlock protected registers */
+ SYS_UnlockReg();
+
+ /*---------------------------------------------------------------------------------------------------------*/
+ /* Init System Clock */
+ /*---------------------------------------------------------------------------------------------------------*/
+
+ /* Enable Internal HIRC 48 MHz clock */
+ CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN);
+
+ /* Waiting for Internal RC clock ready */
+ CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
+
+ /* Switch HCLK clock source to Internal HIRC and HCLK source divide 1 */
+ CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
+
+ /* Enable module clock */
+ CLK_EnableModuleClock(USBD_MODULE);
+
+ /* Select module clock source */
+ CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC, CLK_CLKDIV0_USB(1));
+
+ /* Enable module clock */
+ CLK_EnableModuleClock(USBD_MODULE);
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+ // 1ms tick timer
+ SysTick_Config(48000000 / 1000);
+#endif
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+ system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+ return system_ticks;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+ (void)(state);
+}
+
+uint32_t board_button_read(void)
+{
+ return 0;
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+ (void) buf; (void) len;
+ return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+ (void) buf; (void) len;
+ return 0;
+}
diff --git a/hw/bsp/nutiny_nuc126v/board.mk b/hw/bsp/nutiny_nuc126v/board.mk
new file mode 100644
index 000000000..d38e6c4d5
--- /dev/null
+++ b/hw/bsp/nutiny_nuc126v/board.mk
@@ -0,0 +1,59 @@
+CFLAGS += \
+ -flto \
+ -mthumb \
+ -mabi=aapcs-linux \
+ -mcpu=cortex-m0 \
+ -D__ARM_FEATURE_DSP=0 \
+ -DUSE_ASSERT=0 \
+ -D__CORTEX_SC=0 \
+ -DCFG_TUSB_MCU=OPT_MCU_NUC126
+
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/nutiny_nuc126v/nuc126_flash.ld
+
+SRC_C += \
+ hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Source/system_NUC126.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/acmp.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/adc.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/clk.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/crc.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/ebi.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/fmc.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/gpio.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/pdma.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/pwm.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/rtc.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/sc.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/scuart.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/spi.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/sys.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/timer.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/timer_pwm.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/uart.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/usbd.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/usci_spi.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/usci_uart.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/wdt.c \
+ hw/mcu/nuvoton/nuc126/StdDriver/src/wwdt.c
+
+SRC_S += \
+ hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Source/GCC/startup_NUC126.S
+
+INC += \
+ $(TOP)/hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Include \
+ $(TOP)/hw/mcu/nuvoton/nuc126/StdDriver/inc \
+ $(TOP)/hw/mcu/nuvoton/nuc126/CMSIS/Include
+
+# For TinyUSB port source
+VENDOR = nuvoton
+CHIP_FAMILY = nuc121
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM0
+
+# For flash-jlink target
+JLINK_DEVICE = NUC126VG4AE
+JLINK_IF = swd
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/nutiny_nuc126v/nuc126_flash.ld b/hw/bsp/nutiny_nuc126v/nuc126_flash.ld
new file mode 100644
index 000000000..b23890b4b
--- /dev/null
+++ b/hw/bsp/nutiny_nuc126v/nuc126_flash.ld
@@ -0,0 +1,195 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x40000 /* 256k */
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x5000 /* 20k */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __copy_table_start__
+ * __copy_table_end__
+ * __zero_table_start__
+ * __zero_table_end__
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __end__
+ * end
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ * __Vectors_End
+ * __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.vectors))
+ __Vectors_End = .;
+ __Vectors_Size = __Vectors_End - __Vectors;
+ __end__ = .;
+
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ /* To copy multiple ROM to RAM sections,
+ * uncomment .copy.table section and,
+ * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .copy.table :
+ {
+ . = ALIGN(4);
+ __copy_table_start__ = .;
+ LONG (__etext)
+ LONG (__data_start__)
+ LONG (__data_end__ - __data_start__)
+ LONG (__etext2)
+ LONG (__data2_start__)
+ LONG (__data2_end__ - __data2_start__)
+ __copy_table_end__ = .;
+ } > FLASH
+ */
+
+ /* To clear multiple BSS sections,
+ * uncomment .zero.table section and,
+ * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .zero.table :
+ {
+ . = ALIGN(4);
+ __zero_table_start__ = .;
+ LONG (__bss_start__)
+ LONG (__bss_end__ - __bss_start__)
+ LONG (__bss2_start__)
+ LONG (__bss2_end__ - __bss2_start__)
+ __zero_table_end__ = .;
+ } > FLASH
+ */
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ end = __end__;
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c b/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
new file mode 100644
index 000000000..0ce787d3e
--- /dev/null
+++ b/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
@@ -0,0 +1,133 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board.h"
+#include "NuMicro.h"
+#include "clk.h"
+#include "sys.h"
+
+#define CRYSTAL_LESS /* system will be 48MHz when defined, otherwise, system is 72MHz */
+#define HIRC48_AUTO_TRIM SYS_IRCTCTL1_REFCKSEL_Msk | (1UL << SYS_IRCTCTL1_LOOPSEL_Pos) | (2UL << SYS_IRCTCTL1_FREQSEL_Pos)
+#define TRIM_INIT (SYS_BASE+0x118)
+
+void board_init(void)
+{
+ /* Unlock protected registers */
+ SYS_UnlockReg();
+
+ /*---------------------------------------------------------------------------------------------------------*/
+ /* Init System Clock */
+ /*---------------------------------------------------------------------------------------------------------*/
+
+ /* Enable Internal RC 22.1184 MHz clock */
+ CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
+
+ /* Waiting for Internal RC clock ready */
+ CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
+
+ /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
+ CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
+
+#ifndef CRYSTAL_LESS
+ /* Enable external XTAL 12 MHz clock */
+ CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
+
+ /* Waiting for external XTAL clock ready */
+ CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
+
+ /* Set core clock */
+ CLK_SetCoreClock(72000000);
+
+ /* Use HIRC as UART clock source */
+ CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HIRC, CLK_CLKDIV0_UART(1));
+
+ /* Use PLL as USB clock source */
+ CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_PLL, CLK_CLKDIV0_USB(3));
+
+#else
+ /* Enable Internal RC 48MHz clock */
+ CLK_EnableXtalRC(CLK_PWRCTL_HIRC48EN_Msk);
+
+ /* Waiting for Internal RC clock ready */
+ CLK_WaitClockReady(CLK_STATUS_HIRC48STB_Msk);
+
+ /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
+ CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC48, CLK_CLKDIV0_HCLK(1));
+
+ /* Use HIRC as UART clock source */
+ CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HIRC, CLK_CLKDIV0_UART(1));
+
+ /* Use HIRC48 as USB clock source */
+ CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC48, CLK_CLKDIV0_USB(1));
+#endif
+
+ /* Enable module clock */
+ CLK_EnableModuleClock(USBD_MODULE);
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+ // 1ms tick timer
+ SysTick_Config(48000000 / 1000);
+#endif
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+ system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+ return system_ticks;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+ (void)(state);
+}
+
+uint32_t board_button_read(void)
+{
+ return 0;
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+ (void) buf; (void) len;
+ return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+ (void) buf; (void) len;
+ return 0;
+}
diff --git a/hw/mcu/nuvoton b/hw/mcu/nuvoton
new file mode 160000
+Subproject dc96fff794d14818c93ea1d4d760d51a014d70c
diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c
new file mode 100644
index 000000000..afe2cf001
--- /dev/null
+++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c
@@ -0,0 +1,434 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Peter Lawrence
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/*
+ Theory of operation:
+
+ The NUC121/NUC125/NUC126 USBD peripheral has eight "EP"s, but each is simplex,
+ so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to
+ implement USB EP0. PERIPH_EP0 and PERIPH_EP1 are used by this driver for
+ EP0_IN and EP0_OUT respectively. This leaves up to six for user usage.
+*/
+
+#include "tusb_option.h"
+
+#if TUSB_OPT_DEVICE_ENABLED && ( (CFG_TUSB_MCU == OPT_MCU_NUC121) || (CFG_TUSB_MCU == OPT_MCU_NUC126) )
+
+#include "device/dcd.h"
+#include "NuMicro.h"
+
+/* allocation of USBD RAM for Setup, EP0_IN, and and EP_OUT */
+#define PERIPH_SETUP_BUF_BASE 0
+#define PERIPH_SETUP_BUF_LEN 8
+#define PERIPH_EP0_BUF_BASE (PERIPH_SETUP_BUF_BASE + PERIPH_SETUP_BUF_LEN)
+#define PERIPH_EP0_BUF_LEN CFG_TUD_ENDPOINT0_SIZE
+#define PERIPH_EP1_BUF_BASE (PERIPH_EP0_BUF_BASE + PERIPH_EP0_BUF_LEN)
+#define PERIPH_EP1_BUF_LEN CFG_TUD_ENDPOINT0_SIZE
+#define PERIPH_EP2_BUF_BASE (PERIPH_EP1_BUF_BASE + PERIPH_EP1_BUF_LEN)
+
+/* rather important info unfortunately not provided by device include files: how much there is */
+#define USBD_BUF_SIZE ((CFG_TUSB_MCU == OPT_MCU_NUC121) ? 768 : 512)
+
+enum ep_enum
+{
+ PERIPH_EP0 = 0,
+ PERIPH_EP1 = 1,
+ PERIPH_EP2 = 2,
+ PERIPH_EP3 = 3,
+ PERIPH_EP4 = 4,
+ PERIPH_EP5 = 5,
+ PERIPH_EP6 = 6,
+ PERIPH_EP7 = 7,
+ PERIPH_MAX_EP,
+};
+
+/* set by dcd_set_address() */
+static volatile uint8_t assigned_address;
+
+/* reset by dcd_init(), this is used by dcd_edpt_open() to assign USBD peripheral buffer addresses */
+static uint32_t bufseg_addr;
+
+/* used by dcd_edpt_xfer() and the ISR to reset the data sync (DATA0/DATA1) in an EP0_IN transfer */
+static bool active_ep0_xfer;
+
+/* RAM table needed to track ongoing transfers performed by dcd_edpt_xfer(), dcd_in_xfer(), and the ISR */
+static struct xfer_ctl_t
+{
+ uint8_t *data_ptr; /* collectively, data_ptr and remaining_bytes track progress of endpoint transfers */
+ uint16_t remaining_bytes;
+ uint16_t max_packet_size; /* needed since device driver only finds out this at runtime */
+ uint16_t total_bytes; /* quantity needed to pass as argument to dcd_event_xfer_complete() (for IN endpoints) */
+} xfer_table[PERIPH_MAX_EP];
+
+/*
+ local helper functions
+*/
+
+static void usb_attach(void)
+{
+ USBD->SE0 &= ~USBD_SE0_SE0_Msk;
+}
+
+static void usb_detach(void)
+{
+ USBD->SE0 |= USBD_SE0_SE0_Msk;
+}
+
+static void usb_control_send_zlp(void)
+{
+ USBD->EP[PERIPH_EP0].CFG |= USBD_CFG_DSQSYNC_Msk;
+ USBD->EP[PERIPH_EP0].MXPLD = 0;
+}
+
+/* reconstruct ep_addr from particular USB Configuration Register */
+static uint8_t decode_ep_addr(USBD_EP_T *ep)
+{
+ uint8_t ep_addr = ep->CFG & USBD_CFG_EPNUM_Msk;
+ if ( USBD_CFG_EPMODE_IN == (ep->CFG & USBD_CFG_STATE_Msk) )
+ ep_addr |= TUSB_DIR_IN_MASK;
+ return ep_addr;
+}
+
+/* map 8-bit ep_addr into peripheral endpoint index (PERIPH_EP0...) */
+static USBD_EP_T *ep_entry(uint8_t ep_addr, bool add)
+{
+ USBD_EP_T *ep;
+ enum ep_enum ep_index;
+
+ for (ep_index = PERIPH_EP0, ep = USBD->EP; ep_index < PERIPH_MAX_EP; ep_index++, ep++)
+ {
+ if (add)
+ {
+ /* take first peripheral endpoint that is unused */
+ if (0 == (ep->CFG & USBD_CFG_STATE_Msk)) return ep;
+ }
+ else
+ {
+ /* find a peripheral endpoint that matches ep_addr */
+ uint8_t candidate_ep_addr = decode_ep_addr(ep);
+ if (candidate_ep_addr == ep_addr) return ep;
+ }
+ }
+
+ return NULL;
+}
+
+/* perform an IN endpoint transfer; this is called by dcd_edpt_xfer() and the ISR */
+static void dcd_in_xfer(struct xfer_ctl_t *xfer, USBD_EP_T *ep)
+{
+ uint16_t bytes_now = tu_min16(xfer->remaining_bytes, xfer->max_packet_size);
+
+ memcpy((uint8_t *)(USBD_BUF_BASE + ep->BUFSEG), xfer->data_ptr, bytes_now);
+ ep->MXPLD = bytes_now;
+}
+
+/* centralized location for USBD interrupt enable bit mask */
+static const uint32_t enabled_irqs = USBD_INTSTS_VBDETIF_Msk | USBD_INTSTS_BUSIF_Msk | USBD_INTSTS_SETUP_Msk | USBD_INTSTS_USBIF_Msk | USBD_INTSTS_SOFIF_Msk;
+
+/*
+ NUC121/NUC125/NUC126 TinyUSB API driver implementation
+*/
+
+void dcd_init(uint8_t rhport)
+{
+ (void) rhport;
+
+#ifdef SUPPORT_LPM
+ USBD->ATTR = 0x7D0 | USBD_LPMACK;
+#else
+ USBD->ATTR = 0x7D0;
+#endif
+
+ usb_detach();
+
+ USBD->STBUFSEG = PERIPH_SETUP_BUF_BASE;
+
+ for (enum ep_enum ep_index = PERIPH_EP0; ep_index < PERIPH_MAX_EP; ep_index++)
+ {
+ USBD->EP[ep_index].CFGP &= ~USBD_CFG_STATE_Msk;
+ }
+
+ /* allocate the default EP0 endpoints */
+
+ USBD->EP[PERIPH_EP0].CFG = USBD_CFG_CSTALL_Msk | USBD_CFG_EPMODE_IN;
+ USBD->EP[PERIPH_EP0].BUFSEG = PERIPH_EP0_BUF_BASE;
+ xfer_table[PERIPH_EP0].max_packet_size = PERIPH_EP0_BUF_LEN;
+
+ USBD->EP[PERIPH_EP1].CFG = USBD_CFG_CSTALL_Msk | USBD_CFG_EPMODE_OUT;
+ USBD->EP[PERIPH_EP1].BUFSEG = PERIPH_EP1_BUF_BASE;
+ xfer_table[PERIPH_EP1].max_packet_size = PERIPH_EP1_BUF_LEN;
+
+ /* USB RAM beyond what we've allocated above is available to the user */
+ bufseg_addr = PERIPH_EP2_BUF_BASE;
+
+ usb_attach();
+
+ USBD->INTSTS = enabled_irqs;
+ USBD->INTEN = enabled_irqs;
+}
+
+void dcd_int_enable(uint8_t rhport)
+{
+ (void) rhport;
+ NVIC_EnableIRQ(USBD_IRQn);
+}
+
+void dcd_int_disable(uint8_t rhport)
+{
+ (void) rhport;
+ NVIC_DisableIRQ(USBD_IRQn);
+}
+
+void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
+{
+ (void) rhport;
+ usb_control_send_zlp(); /* SET_ADDRESS is the one exception where TinyUSB doesn't use dcd_edpt_xfer() to generate a ZLP */
+ assigned_address = dev_addr;
+}
+
+void dcd_set_config(uint8_t rhport, uint8_t config_num)
+{
+ (void) rhport;
+ (void) config_num;
+}
+
+void dcd_remote_wakeup(uint8_t rhport)
+{
+ (void) rhport;
+ USBD->ATTR = USBD_ATTR_RWAKEUP_Msk;
+}
+
+bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
+{
+ (void) rhport;
+
+ USBD_EP_T *ep = ep_entry(p_endpoint_desc->bEndpointAddress, true);
+ TU_ASSERT(ep);
+
+ /* mine the data for the information we need */
+ int const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
+ int const size = p_endpoint_desc->wMaxPacketSize.size;
+ tusb_xfer_type_t const type = p_endpoint_desc->bmAttributes.xfer;
+ struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP];
+
+ /* allocate buffer from USB RAM */
+ ep->BUFSEG = bufseg_addr;
+ bufseg_addr += size;
+ TU_ASSERT(bufseg_addr <= USBD_BUF_SIZE);
+
+ /* construct USB Configuration Register value and then write it */
+ uint32_t cfg = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
+ cfg |= (TUSB_DIR_IN == dir) ? USBD_CFG_EPMODE_IN : USBD_CFG_EPMODE_OUT;
+ if (TUSB_XFER_ISOCHRONOUS == type)
+ cfg |= USBD_CFG_TYPE_ISO;
+ ep->CFG = cfg;
+
+ /* make a note of the endpoint size */
+ xfer->max_packet_size = size;
+
+ return true;
+}
+
+bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
+{
+ (void) rhport;
+
+ /* mine the data for the information we need */
+ tusb_dir_t dir = tu_edpt_dir(ep_addr);
+ USBD_EP_T *ep = ep_entry(ep_addr, false);
+ struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP];
+
+ /* store away the information we'll needing now and later */
+ xfer->data_ptr = buffer;
+ xfer->remaining_bytes = total_bytes;
+ xfer->total_bytes = total_bytes;
+
+ /* for the first of one or more EP0_IN packets in a message, the first must be DATA1 */
+ if ( (0x80 == ep_addr) && !active_ep0_xfer ) ep->CFG |= USBD_CFG_DSQSYNC_Msk;
+
+ if (TUSB_DIR_IN == dir)
+ dcd_in_xfer(xfer, ep);
+ else
+ ep->MXPLD = xfer->max_packet_size;
+
+ return true;
+}
+
+void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
+{
+ (void) rhport;
+ USBD_EP_T *ep = ep_entry(ep_addr, false);
+ ep->CFGP |= USBD_CFGP_SSTALL_Msk;
+}
+
+void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
+{
+ (void) rhport;
+ USBD_EP_T *ep = ep_entry(ep_addr, false);
+ ep->CFG |= USBD_CFG_CSTALL_Msk;
+}
+
+void USBD_IRQHandler(void)
+{
+ uint32_t status = USBD->INTSTS;
+#ifdef SUPPORT_LPM
+ uint32_t state = USBD->ATTR & 0x300f;
+#else
+ uint32_t state = USBD->ATTR & 0xf;
+#endif
+
+ if(status & USBD_INTSTS_VBDETIF_Msk)
+ {
+ if(USBD->VBUSDET & USBD_VBUSDET_VBUSDET_Msk)
+ {
+ /* USB connect */
+ USBD->ATTR |= USBD_ATTR_USBEN_Msk | USBD_ATTR_PHYEN_Msk;
+ }
+ else
+ {
+ /* USB disconnect */
+ USBD->ATTR &= ~USBD_ATTR_USBEN_Msk;
+ }
+ }
+
+ if(status & USBD_INTSTS_BUSIF_Msk)
+ {
+ if(state & USBD_ATTR_USBRST_Msk)
+ {
+ /* USB bus reset */
+ USBD->ATTR |= USBD_ATTR_USBEN_Msk | USBD_ATTR_PHYEN_Msk;
+
+ /* Reset all endpoints to DATA0 */
+ for(enum ep_enum ep_index = PERIPH_EP0; ep_index < PERIPH_MAX_EP; ep_index++)
+ USBD->EP[ep_index].CFG &= ~USBD_CFG_DSQSYNC_Msk;
+
+ /* Reset USB device address */
+ USBD->FADDR = 0;
+
+ /* reset EP0_IN flag */
+ active_ep0_xfer = false;
+
+ dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
+ }
+
+ if(state & USBD_ATTR_SUSPEND_Msk)
+ {
+ /* Enable USB but disable PHY */
+ USBD->ATTR &= ~USBD_ATTR_PHYEN_Msk;
+ dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
+ }
+
+ if(state & USBD_ATTR_RESUME_Msk)
+ {
+ /* Enable USB and enable PHY */
+ USBD->ATTR |= USBD_ATTR_USBEN_Msk | USBD_ATTR_PHYEN_Msk;
+ dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
+ }
+ }
+
+ if(status & USBD_INTSTS_SETUP_Msk)
+ {
+ /* clear the data ready flag of control endpoints */
+ USBD->EP[PERIPH_EP0].CFGP |= USBD_CFGP_CLRRDY_Msk;
+ USBD->EP[PERIPH_EP1].CFGP |= USBD_CFGP_CLRRDY_Msk;
+
+ /* get SETUP packet from USB buffer */
+ dcd_event_setup_received(0, (uint8_t *)USBD_BUF_BASE, true);
+ }
+
+ if(status & USBD_INTSTS_USBIF_Msk)
+ {
+ if (status & USBD_INTSTS_EPEVT0_Msk) /* PERIPH_EP0 (EP0_IN) event: this is treated separately from the rest */
+ {
+ /* given ACK from host has happened, we can now set the address (if not already done) */
+ if((USBD->FADDR != assigned_address) && (USBD->FADDR == 0)) USBD->FADDR = assigned_address;
+
+ uint16_t const available_bytes = USBD->EP[PERIPH_EP0].MXPLD;
+
+ active_ep0_xfer = (available_bytes == xfer_table[PERIPH_EP0].max_packet_size);
+
+ dcd_event_xfer_complete(0, 0x80, available_bytes, XFER_RESULT_SUCCESS, true);
+ }
+
+ /* service PERIPH_EP1 through PERIPH_EP7 */
+ enum ep_enum ep_index;
+ uint32_t mask;
+ struct xfer_ctl_t *xfer;
+ USBD_EP_T *ep;
+ for (ep_index = PERIPH_EP1, mask = USBD_INTSTS_EPEVT1_Msk, xfer = &xfer_table[PERIPH_EP1], ep = &USBD->EP[PERIPH_EP1]; ep_index <= PERIPH_EP7; ep_index++, mask <<= 1, xfer++, ep++)
+ {
+ if(status & mask)
+ {
+ USBD->INTSTS = mask;
+
+ uint16_t const available_bytes = ep->MXPLD;
+ uint8_t const ep_addr = decode_ep_addr(ep);
+ bool const out_ep = !(ep_addr & TUSB_DIR_IN_MASK);
+
+ if (out_ep)
+ {
+ /* copy the data from the PC to the previously provided buffer */
+ memcpy(xfer->data_ptr, (uint8_t *)(USBD_BUF_BASE + ep->BUFSEG), available_bytes);
+ xfer->remaining_bytes -= available_bytes;
+ xfer->data_ptr += available_bytes;
+
+ /* when the transfer is finished, alert TinyUSB */
+ if ( (0 == xfer->remaining_bytes) || (available_bytes < xfer->max_packet_size) )
+ dcd_event_xfer_complete(0, ep_addr, available_bytes, XFER_RESULT_SUCCESS, true);
+ }
+ else
+ {
+ /* update the bookkeeping to reflect the data that has now been sent to the PC */
+ xfer->remaining_bytes -= available_bytes;
+ xfer->data_ptr += available_bytes;
+
+ /* if more data to send, send it; otherwise, alert TinyUSB that we've finished */
+ if (xfer->remaining_bytes)
+ dcd_in_xfer(xfer, ep);
+ else
+ dcd_event_xfer_complete(0, ep_addr, xfer->total_bytes, XFER_RESULT_SUCCESS, true);
+ }
+ }
+ }
+ }
+
+ if(status & USBD_INTSTS_SOFIF_Msk)
+ {
+ /* Start-Of-Frame event */
+ dcd_event_bus_signal(0, DCD_EVENT_SOF, true);
+ }
+
+ /* acknowledge all interrupts */
+ USBD->INTSTS = status & enabled_irqs;
+}
+
+void dcd_isr(uint8_t rhport)
+{
+ (void) rhport;
+ USBD_IRQHandler();
+}
+
+#endif
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 266687ff7..6d547077e 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -77,6 +77,9 @@
#define OPT_MCU_MIMXRT10XX 700 ///< NXP iMX RT10xx
+#define OPT_MCU_NUC121 800
+#define OPT_MCU_NUC126 801
+
/** @} */
/** \defgroup group_supported_os Supported RTOS
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-17 11:31:18 +0000