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-rw-r--r--src/common/tusb_common.h50
-rw-r--r--src/common/tusb_debug.h6
-rw-r--r--src/common/tusb_fifo.c8
-rw-r--r--src/common/tusb_mcu.h100
-rw-r--r--src/common/tusb_types.h45
5 files changed, 152 insertions, 57 deletions
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 0351a3d8f..e35d3e6fe 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -78,10 +78,16 @@
#include "tusb_debug.h"
//--------------------------------------------------------------------+
-// Optional API implemented by application if needed
+// API implemented by application if needed
// TODO move to a more obvious place/file
//--------------------------------------------------------------------+
+// Get current milliseconds, required by some port/configuration without RTOS
+extern uint32_t tusb_time_millis_api(void);
+
+// Delay in milliseconds, use tusb_time_millis_api() by default. required by some port/configuration with no RTOS
+extern void tusb_time_delay_ms_api(uint32_t ms);
+
// flush data cache
TU_ATTR_WEAK extern void tusb_app_dcache_flush(uintptr_t addr, uint32_t data_size);
@@ -162,8 +168,8 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t ui16) { return
TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t ui16) { return TU_U16_LOW(ui16); }
//------------- Bits -------------//
-TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_bit_set (uint32_t value, uint8_t pos) { return value | TU_BIT(pos); }
-TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_bit_clear(uint32_t value, uint8_t pos) { return value & (~TU_BIT(pos)); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_bit_set (uint32_t value, uint8_t pos) { return value | TU_BIT(pos); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_bit_clear(uint32_t value, uint8_t pos) { return value & (~TU_BIT(pos)); }
TU_ATTR_ALWAYS_INLINE static inline bool tu_bit_test (uint32_t value, uint8_t pos) { return (value & TU_BIT(pos)) ? true : false; }
//------------- Min -------------//
@@ -324,6 +330,44 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void *mem, uint16_
+ TU_BIN8(dlsb))
#endif
+//--------------------------------------------------------------------+
+// Descriptor helper
+//--------------------------------------------------------------------+
+
+// return next descriptor
+TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) {
+ uint8_t const* desc8 = (uint8_t const*) desc;
+ return desc8 + desc8[DESC_OFFSET_LEN];
+}
+
+// get descriptor length
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) {
+ return ((uint8_t const*) desc)[DESC_OFFSET_LEN];
+}
+
+// get descriptor type
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) {
+ return ((uint8_t const*) desc)[DESC_OFFSET_TYPE];
+}
+
+// get descriptor subtype
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_subtype(void const* desc) {
+ return ((uint8_t const*) desc)[DESC_OFFSET_SUBTYPE];
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_in_bounds(uint8_t const* p_desc, uint8_t const* desc_end) {
+ return (p_desc < desc_end) && (tu_desc_next(p_desc) <= desc_end);
+}
+
+// find descriptor that match byte1 (type)
+uint8_t const * tu_desc_find(uint8_t const* desc, uint8_t const* end, uint8_t byte1);
+
+// find descriptor that match byte1 (type) and byte2
+uint8_t const * tu_desc_find2(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2);
+
+// find descriptor that match byte1 (type) and byte2
+uint8_t const * tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2, uint8_t byte3);
+
#ifdef __cplusplus
}
#endif
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index 2e9f1d9cd..1d0c6f1ad 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -108,15 +108,13 @@ typedef struct {
} tu_lookup_table_t;
static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) {
- tu_static char not_found[11];
-
for(uint16_t i=0; i<p_table->count; i++) {
- if (p_table->items[i].key == key) return p_table->items[i].data;
+ if (p_table->items[i].key == key) { return p_table->items[i].data; }
}
// not found return the key value in hex
+ static char not_found[11];
snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long) key);
-
return not_found;
}
diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index 5f2dcabad..f7679556f 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -428,7 +428,6 @@ static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16
if ( cnt > f->depth )
{
rd_idx = _ff_correct_read_index(f, wr_idx);
- cnt = f->depth;
}
uint16_t rd_ptr = idx2ptr(f->depth, rd_idx);
@@ -916,8 +915,11 @@ bool tu_fifo_clear(tu_fifo_t *f)
Overwritable mode the fifo is set to
*/
/******************************************************************************/
-bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable)
-{
+bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) {
+ if (f->overwritable == overwritable) {
+ return true;
+ }
+
_ff_lock(f->mutex_wr);
_ff_lock(f->mutex_rd);
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index a0175d664..7722ca1e6 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -117,9 +117,9 @@
#define TUP_RHPORT_HIGHSPEED 1
#if __CORTEX_M == 7
- #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT 1
- #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT 1
- #define CFG_TUSB_MEM_DCACHE_LINE_SIZE 32
+ #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT 1
+ #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT 1
+ #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
#endif
#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K)
@@ -220,12 +220,25 @@
#define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
#endif
+ // Enable dcache if DMA is enabled
+ #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT CFG_TUD_DWC2_DMA_ENABLE
+ #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT CFG_TUH_DWC2_DMA_ENABLE
+ #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+
#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
+ #include "stm32h7xx.h"
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_STM32
#define TUP_DCD_ENDPOINT_MAX 9
+ #if __CORTEX_M == 7
+ // Enable dcache if DMA is enabled
+ #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT CFG_TUD_DWC2_DMA_ENABLE
+ #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT CFG_TUH_DWC2_DMA_ENABLE
+ #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+ #endif
+
#elif TU_CHECK_MCU(OPT_MCU_STM32H5)
#define TUP_USBIP_FSDEV
#define TUP_USBIP_FSDEV_STM32
@@ -282,6 +295,12 @@
#define TUP_USBIP_FSDEV_STM32
#define TUP_DCD_ENDPOINT_MAX 8
+#elif TU_CHECK_MCU(OPT_MCU_STM32WBA)
+ #define TUP_USBIP_DWC2
+ #define TUP_USBIP_DWC2_STM32
+ #define TUP_DCD_ENDPOINT_MAX 9
+ #define TUP_RHPORT_HIGHSPEED 1
+
#elif TU_CHECK_MCU(OPT_MCU_STM32U5)
#if defined (STM32U535xx) || defined (STM32U545xx)
#define TUP_USBIP_FSDEV
@@ -312,7 +331,7 @@
#define TUP_USBIP_FSDEV_STM32
#define TUP_DCD_ENDPOINT_MAX 8
-#elif TU_CHECK_MCU(OPT_MCU_STM32H7RS)
+#elif TU_CHECK_MCU(OPT_MCU_STM32H7RS, OPT_MCU_STM32N6)
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_STM32
@@ -322,6 +341,11 @@
// MCU with on-chip HS Phy
#define TUP_RHPORT_HIGHSPEED 1
+ // Enable dcache if DMA is enabled
+ #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT CFG_TUD_DWC2_DMA_ENABLE
+ #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT CFG_TUH_DWC2_DMA_ENABLE
+ #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+
//--------------------------------------------------------------------+
// Sony
//--------------------------------------------------------------------+
@@ -369,6 +393,10 @@
#define TUP_DCD_ENDPOINT_MAX 7 // only 5 TX FIFO for endpoint IN
#define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/
+ #if CFG_TUSB_MCU == OPT_MCU_ESP32S3
+ #define TUP_MCU_MULTIPLE_CORE 1
+ #endif
+
// Disable slave if DMA is enabled
#define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUD_DWC2_DMA_ENABLE
#define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUH_DWC2_DMA_ENABLE
@@ -381,16 +409,18 @@
#define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/
+ #define TUP_MCU_MULTIPLE_CORE 1
+
// Disable slave if DMA is enabled
#define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUD_DWC2_DMA_ENABLE
#define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUH_DWC2_DMA_ENABLE
// Enable dcache if DMA is enabled
- #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT CFG_TUD_DWC2_DMA_ENABLE
- #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT CFG_TUH_DWC2_DMA_ENABLE
+ #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT CFG_TUD_DWC2_DMA_ENABLE
+ #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT CFG_TUH_DWC2_DMA_ENABLE
#define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 64
-#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C6, OPT_MCU_ESP32H2)
+#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C5, OPT_MCU_ESP32C6, OPT_MCU_ESP32C61, OPT_MCU_ESP32H2)
#if (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421))
#error "MCUs are only supported with CFG_TUH_MAX3421 enabled"
#endif
@@ -410,6 +440,7 @@
#elif TU_CHECK_MCU(OPT_MCU_RP2040)
#define TUP_DCD_EDPT_ISO_ALLOC
#define TUP_DCD_ENDPOINT_MAX 16
+ #define TUP_MCU_MULTIPLE_CORE 1
#define TU_ATTR_FAST_FUNC __attribute__((section(".time_critical.tinyusb")))
@@ -496,11 +527,17 @@
#define TUP_DCD_ENDPOINT_MAX 8
#elif TU_CHECK_MCU(OPT_MCU_CH32V20X)
- // v20x support both FSDEV (USBD) and USBFS, default to FSDEV
+ // v20x support both port0 FSDEV (USBD) and port1 USBFS
#define TUP_USBIP_WCH_USBFS
+
+ #ifndef CFG_TUH_WCH_USBIP_USBFS
+ #define CFG_TUH_WCH_USBIP_USBFS 1
+ #endif
+
#define TUP_USBIP_FSDEV
#define TUP_USBIP_FSDEV_CH32
+ // default to FSDEV for device
#if !defined(CFG_TUD_WCH_USBIP_USBFS)
#define CFG_TUD_WCH_USBIP_USBFS 0
#endif
@@ -537,6 +574,53 @@
#define TUP_RHPORT_HIGHSPEED 1
#define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+//--------------------------------------------------------------------+
+// ArteryTek
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F403A_407)
+ #define TUP_USBIP_FSDEV
+ #define TUP_USBIP_FSDEV_AT32
+ #define TUP_DCD_ENDPOINT_MAX 8
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F413)
+ #define TUP_USBIP_FSDEV
+ #define TUP_USBIP_FSDEV_AT32
+ #define TUP_DCD_ENDPOINT_MAX 8
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F415)
+ #define TUP_USBIP_DWC2
+ #define TUP_USBIP_DWC2_AT32
+ #define TUP_DCD_ENDPOINT_MAX 4
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F435_437)
+ #define TUP_USBIP_DWC2
+ #define TUP_USBIP_DWC2_AT32
+ #define TUP_DCD_ENDPOINT_MAX 8
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F423)
+ #define TUP_USBIP_DWC2
+ #define TUP_USBIP_DWC2_AT32
+ #define TUP_DCD_ENDPOINT_MAX 8
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F402_405)
+ #define TUP_USBIP_DWC2
+ #define TUP_USBIP_DWC2_AT32
+ #define TUP_DCD_ENDPOINT_MAX 8
+
+ // AT32F405xx has on-chip HS PHY
+ #if defined(AT32F405CBT7) || defined(AT32F405CBU7) || \
+ defined(AT32F405CCT7) || defined(AT32F405CCU7) || \
+ defined(AT32F405KBU7_4) || defined(AT32F405KCU7_4) || \
+ defined(AT32F405RBT7_7) || defined(AT32F405RBT7) || \
+ defined(AT32F405RCT7_7) || defined(AT32F405RCT7)
+ #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
+ #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F425)
+ #define TUP_USBIP_DWC2
+ #define TUP_USBIP_DWC2_AT32
+ #define TUP_DCD_ENDPOINT_MAX 8
+
#endif
//--------------------------------------------------------------------+
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index e000a4bd3..b3ef1e9c9 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -43,14 +43,14 @@
#define TUD_EPBUF_DEF(_name, _size) \
union { \
CFG_TUD_MEM_ALIGN uint8_t _name[_size]; \
- uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(_size)]; \
+ TU_ATTR_ALIGNED(CFG_TUD_MEM_DCACHE_ENABLE ? CFG_TUD_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(_size)]; \
}
// Declare an endpoint buffer with a type
#define TUD_EPBUF_TYPE_DEF(_type, _name) \
union { \
CFG_TUD_MEM_ALIGN _type _name; \
- uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
+ TU_ATTR_ALIGNED(CFG_TUD_MEM_DCACHE_ENABLE ? CFG_TUD_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
}
//------------- Host DCache declaration -------------//
@@ -61,14 +61,14 @@
#define TUH_EPBUF_DEF(_name, _size) \
union { \
CFG_TUH_MEM_ALIGN uint8_t _name[_size]; \
- uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(_size)]; \
+ TU_ATTR_ALIGNED(CFG_TUH_MEM_DCACHE_ENABLE ? CFG_TUH_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(_size)]; \
}
// Declare an endpoint buffer with a type
#define TUH_EPBUF_TYPE_DEF(_type, _name) \
union { \
CFG_TUH_MEM_ALIGN _type _name; \
- uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
+ TU_ATTR_ALIGNED(CFG_TUH_MEM_DCACHE_ENABLE ? CFG_TUH_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
}
@@ -278,6 +278,8 @@ typedef enum {
XFER_RESULT_INVALID
} xfer_result_t;
+#define tusb_xfer_result_t xfer_result_t
+
// TODO remove
enum {
DESC_OFFSET_LEN = 0,
@@ -345,7 +347,6 @@ typedef struct TU_ATTR_PACKED {
uint8_t iManufacturer ; ///< Index of string descriptor describing manufacturer.
uint8_t iProduct ; ///< Index of string descriptor describing product.
uint8_t iSerialNumber ; ///< Index of string descriptor describing the device's serial number.
-
uint8_t bNumConfigurations ; ///< Number of possible configurations.
} tusb_desc_device_t;
@@ -561,40 +562,6 @@ TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_
}
#endif
-//--------------------------------------------------------------------+
-// Descriptor helper
-//--------------------------------------------------------------------+
-
-// return next descriptor
-TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) {
- uint8_t const* desc8 = (uint8_t const*) desc;
- return desc8 + desc8[DESC_OFFSET_LEN];
-}
-
-// get descriptor length
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) {
- return ((uint8_t const*) desc)[DESC_OFFSET_LEN];
-}
-
-// get descriptor type
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) {
- return ((uint8_t const*) desc)[DESC_OFFSET_TYPE];
-}
-
-// get descriptor subtype
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_subtype(void const* desc) {
- return ((uint8_t const*) desc)[DESC_OFFSET_SUBTYPE];
-}
-
-// find descriptor that match byte1 (type)
-uint8_t const * tu_desc_find(uint8_t const* desc, uint8_t const* end, uint8_t byte1);
-
-// find descriptor that match byte1 (type) and byte2
-uint8_t const * tu_desc_find2(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2);
-
-// find descriptor that match byte1 (type) and byte2
-uint8_t const * tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2, uint8_t byte3);
-
#ifdef __cplusplus
}
#endif
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-16 17:46:36 +0000