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-rw-r--r--src/osal/osal.h4
-rw-r--r--src/osal/osal_freertos.h107
-rw-r--r--src/osal/osal_mynewt.h26
-rw-r--r--src/osal/osal_none.h27
-rw-r--r--src/osal/osal_pico.h21
-rw-r--r--src/osal/osal_rtthread.h26
-rw-r--r--src/osal/osal_rtx4.h19
-rw-r--r--src/osal/osal_zephyr.h29
8 files changed, 227 insertions, 32 deletions
diff --git a/src/osal/osal.h b/src/osal/osal.h
index 38d45da44..a33280425 100644
--- a/src/osal/osal.h
+++ b/src/osal/osal.h
@@ -75,6 +75,10 @@ typedef void (*osal_task_func_t)( void * );
// OSAL Porting API
// Should be implemented as static inline function in osal_port.h header
/*
+ void osal_spin_init(osal_spinlock_t *ctx);
+ void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr)
+ void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr);
+
osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef);
bool osal_semaphore_delete(osal_semaphore_t semd_hdl);
bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr);
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index a3a0f3a3f..bde5ec010 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -42,20 +42,20 @@ extern "C" {
//--------------------------------------------------------------------+
#if configSUPPORT_STATIC_ALLOCATION
- typedef StaticSemaphore_t osal_semaphore_def_t;
- typedef StaticSemaphore_t osal_mutex_def_t;
+typedef StaticSemaphore_t osal_semaphore_def_t;
+typedef StaticSemaphore_t osal_mutex_def_t;
#else
- // not used therefore defined to smallest possible type to save space
- typedef uint8_t osal_semaphore_def_t;
- typedef uint8_t osal_mutex_def_t;
+
+// not used therefore defined to the smallest possible type to save space
+typedef uint8_t osal_semaphore_def_t;
+typedef uint8_t osal_mutex_def_t;
#endif
typedef SemaphoreHandle_t osal_semaphore_t;
typedef SemaphoreHandle_t osal_mutex_t;
typedef QueueHandle_t osal_queue_t;
-typedef struct
-{
+typedef struct {
uint16_t depth;
uint16_t item_sz;
void* buf;
@@ -83,16 +83,14 @@ typedef struct
//--------------------------------------------------------------------+
// TASK API
//--------------------------------------------------------------------+
-
TU_ATTR_ALWAYS_INLINE static inline uint32_t _osal_ms2tick(uint32_t msec) {
- if ( msec == OSAL_TIMEOUT_WAIT_FOREVER ) return portMAX_DELAY;
- if ( msec == 0 ) return 0;
+ if (msec == OSAL_TIMEOUT_WAIT_FOREVER) { return portMAX_DELAY; }
+ if (msec == 0) { return 0; }
uint32_t ticks = pdMS_TO_TICKS(msec);
- // configTICK_RATE_HZ is less than 1000 and 1 tick > 1 ms
- // we still need to delay at least 1 tick
- if ( ticks == 0 ) ticks = 1;
+ // If configTICK_RATE_HZ is less than 1000 and 1 tick > 1 ms, we still need to delay at least 1 tick
+ if (ticks == 0) { ticks = 1; }
return ticks;
}
@@ -102,9 +100,70 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
}
//--------------------------------------------------------------------+
-// Semaphore API
+// Spinlock API
//--------------------------------------------------------------------+
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+ osal_spinlock_t _name
+
+#if TUSB_MCU_VENDOR_ESPRESSIF
+// Espressif critical take spinlock as argument and does not use in_isr
+typedef portMUX_TYPE osal_spinlock_t;
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+ spinlock_initialize(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
+ portENTER_CRITICAL(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
+ portEXIT_CRITICAL(ctx);
+}
+
+#else
+
+typedef UBaseType_t osal_spinlock_t;
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+ (void) ctx;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+ if (in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE) {
+ (void) ctx;
+ return; // single core MCU does not need to lock in ISR
+ }
+ *ctx = taskENTER_CRITICAL_FROM_ISR();
+ } else {
+ taskENTER_CRITICAL();
+ }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+ if (in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE) {
+ (void) ctx;
+ return; // single core MCU does not need to lock in ISR
+ }
+ taskEXIT_CRITICAL_FROM_ISR(*ctx);
+ } else {
+ taskEXIT_CRITICAL();
+ }
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Semaphore API
+//--------------------------------------------------------------------+
TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t *semdef) {
#if configSUPPORT_STATIC_ALLOCATION
return xSemaphoreCreateBinaryStatic(semdef);
@@ -120,19 +179,12 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t
}
TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
- if ( !in_isr ) {
+ if (!in_isr) {
return xSemaphoreGive(sem_hdl) != 0;
} else {
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
BaseType_t res = xSemaphoreGiveFromISR(sem_hdl, &xHigherPriorityTaskWoken);
-
-#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
- // not needed after https://github.com/espressif/esp-idf/commit/c5fd79547ac9b7bae06fa660e9f814d18d3390b7
- if ( xHigherPriorityTaskWoken ) portYIELD_FROM_ISR();
-#else
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
-#endif
-
return res != 0;
}
}
@@ -148,7 +200,6 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t c
//--------------------------------------------------------------------+
// MUTEX API (priority inheritance)
//--------------------------------------------------------------------+
-
TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t *mdef) {
#if configSUPPORT_STATIC_ALLOCATION
return xSemaphoreCreateMutexStatic(mdef);
@@ -174,7 +225,6 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hd
//--------------------------------------------------------------------+
// QUEUE API
//--------------------------------------------------------------------+
-
TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
osal_queue_t q;
@@ -201,19 +251,12 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, v
}
TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const *data, bool in_isr) {
- if ( !in_isr ) {
+ if (!in_isr) {
return xQueueSendToBack(qhdl, data, OSAL_TIMEOUT_WAIT_FOREVER) != 0;
} else {
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
BaseType_t res = xQueueSendToBackFromISR(qhdl, data, &xHigherPriorityTaskWoken);
-
-#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
- // not needed after https://github.com/espressif/esp-idf/commit/c5fd79547ac9b7bae06fa660e9f814d18d3390b7 (IDF v5)
- if ( xHigherPriorityTaskWoken ) portYIELD_FROM_ISR();
-#else
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
-#endif
-
return res != 0;
}
}
diff --git a/src/osal/osal_mynewt.h b/src/osal/osal_mynewt.h
index 16def0d2a..6d51f8ec3 100644
--- a/src/osal/osal_mynewt.h
+++ b/src/osal/osal_mynewt.h
@@ -41,6 +41,32 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
}
//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+typedef os_sr_t osal_spinlock_t;
+
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+ osal_spinlock_t _name
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+ (void) ctx;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
+ OS_ENTER_CRITICAL(*ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
+ OS_EXIT_CRITICAL(*ctx);
+}
+
+//--------------------------------------------------------------------+
// Semaphore API
//--------------------------------------------------------------------+
typedef struct os_sem osal_semaphore_def_t;
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index 40e9bb83a..a8eb1042b 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -41,6 +41,33 @@ TU_ATTR_WEAK void osal_task_delay(uint32_t msec);
#endif
//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+typedef struct {
+ void (* interrupt_set)(bool);
+} osal_spinlock_t;
+
+// For SMP, spinlock must be locked by hardware, cannot just use interrupt
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+ osal_spinlock_t _name = { .interrupt_set = _int_set }
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+ (void) ctx;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!in_isr) {
+ ctx->interrupt_set(false);
+ }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!in_isr) {
+ ctx->interrupt_set(true);
+ }
+}
+
+//--------------------------------------------------------------------+
// Binary Semaphore API
//--------------------------------------------------------------------+
typedef struct {
diff --git a/src/osal/osal_pico.h b/src/osal/osal_pico.h
index 315de0950..ace5907d7 100644
--- a/src/osal/osal_pico.h
+++ b/src/osal/osal_pico.h
@@ -44,6 +44,27 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
}
//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+typedef critical_section_t osal_spinlock_t; // pico implement critical section with spinlock
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+ osal_spinlock_t _name
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+ critical_section_init(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+ (void) in_isr;
+ critical_section_enter_blocking(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+ (void) in_isr;
+ critical_section_exit(ctx);
+}
+
+//--------------------------------------------------------------------+
// Binary Semaphore API
//--------------------------------------------------------------------+
typedef struct semaphore osal_semaphore_def_t, * osal_semaphore_t;
diff --git a/src/osal/osal_rtthread.h b/src/osal/osal_rtthread.h
index c27814835..a778f5425 100644
--- a/src/osal/osal_rtthread.h
+++ b/src/osal/osal_rtthread.h
@@ -43,6 +43,32 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
}
//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+typedef struct rt_spinlock osal_spinlock_t;
+
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+ osal_spinlock_t _name
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+ rt_spin_lock_init(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
+ rt_spin_lock(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
+ rt_spin_unlock(ctx);
+}
+
+//--------------------------------------------------------------------+
// Semaphore API
//--------------------------------------------------------------------+
typedef struct rt_semaphore osal_semaphore_def_t;
diff --git a/src/osal/osal_rtx4.h b/src/osal/osal_rtx4.h
index 35909e4d6..35860ddd5 100644
--- a/src/osal/osal_rtx4.h
+++ b/src/osal/osal_rtx4.h
@@ -57,6 +57,25 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t msec2wait(uint32_t msec) {
}
//--------------------------------------------------------------------+
+// Spinlock API, stub not implemented
+//--------------------------------------------------------------------+
+typedef uint8_t osal_spinlock_t;
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+ osal_spinlock_t _name
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+ (void) ctx;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+ (void) ctx; (void) in_isr;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+ (void) ctx; (void) in_isr;
+}
+
+//--------------------------------------------------------------------+
// Semaphore API
//--------------------------------------------------------------------+
typedef OS_SEM osal_semaphore_def_t;
diff --git a/src/osal/osal_zephyr.h b/src/osal/osal_zephyr.h
index 8ecb13c6d..91f225f79 100644
--- a/src/osal/osal_zephyr.h
+++ b/src/osal/osal_zephyr.h
@@ -36,6 +36,35 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
}
//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+typedef struct {
+ struct k_spinlock lock;
+ k_spinlock_key_t key;
+} osal_spinlock_t;
+
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+ osal_spinlock_t _name
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+ (void) ctx;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
+ ctx->key = k_spin_lock(&ctx->lock);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
+ k_spin_unlock(&ctx->lock, ctx->key);
+}
+
+//--------------------------------------------------------------------+
// Binary Semaphore API
//--------------------------------------------------------------------+
typedef struct k_sem osal_semaphore_def_t, * osal_semaphore_t;
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-16 23:06:14 +0000