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Diffstat (limited to 'src/portable/st/stm32_fsdev/fsdev_ch32.h')
-rw-r--r--src/portable/st/stm32_fsdev/fsdev_ch32.h116
1 files changed, 4 insertions, 112 deletions
diff --git a/src/portable/st/stm32_fsdev/fsdev_ch32.h b/src/portable/st/stm32_fsdev/fsdev_ch32.h
index ceebb6dab..b92bf3f58 100644
--- a/src/portable/st/stm32_fsdev/fsdev_ch32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_ch32.h
@@ -53,7 +53,6 @@
#pragma GCC diagnostic pop
#endif
-#define FSDEV_PMA_SIZE (512u)
#define FSDEV_USE_SBUF_ISO 0
#define FSDEV_REG_BASE (APB1PERIPH_BASE + 0x00005C00UL)
#define FSDEV_PMA_BASE (APB1PERIPH_BASE + 0x00006000UL)
@@ -62,113 +61,6 @@
#define CFG_TUD_FSDEV_DOUBLE_BUFFERED_ISO_EP 0
#endif
-/**************************** ISTR interrupt events *************************/
-#define USB_ISTR_CTR ((uint16_t)0x8000U) /*!< Correct TRansfer (clear-only bit) */
-#define USB_ISTR_PMAOVR ((uint16_t)0x4000U) /*!< DMA OVeR/underrun (clear-only bit) */
-#define USB_ISTR_ERR ((uint16_t)0x2000U) /*!< ERRor (clear-only bit) */
-#define USB_ISTR_WKUP ((uint16_t)0x1000U) /*!< WaKe UP (clear-only bit) */
-#define USB_ISTR_SUSP ((uint16_t)0x0800U) /*!< SUSPend (clear-only bit) */
-#define USB_ISTR_RESET ((uint16_t)0x0400U) /*!< RESET (clear-only bit) */
-#define USB_ISTR_SOF ((uint16_t)0x0200U) /*!< Start Of Frame (clear-only bit) */
-#define USB_ISTR_ESOF ((uint16_t)0x0100U) /*!< Expected Start Of Frame (clear-only bit) */
-#define USB_ISTR_DIR ((uint16_t)0x0010U) /*!< DIRection of transaction (read-only bit) */
-#define USB_ISTR_EP_ID ((uint16_t)0x000FU) /*!< EndPoint IDentifier (read-only bit) */
-
-/* Legacy defines */
-#define USB_ISTR_PMAOVRM USB_ISTR_PMAOVR
-
-#define USB_CLR_CTR (~USB_ISTR_CTR) /*!< clear Correct TRansfer bit */
-#define USB_CLR_PMAOVR (~USB_ISTR_PMAOVR) /*!< clear DMA OVeR/underrun bit*/
-#define USB_CLR_ERR (~USB_ISTR_ERR) /*!< clear ERRor bit */
-#define USB_CLR_WKUP (~USB_ISTR_WKUP) /*!< clear WaKe UP bit */
-#define USB_CLR_SUSP (~USB_ISTR_SUSP) /*!< clear SUSPend bit */
-#define USB_CLR_RESET (~USB_ISTR_RESET) /*!< clear RESET bit */
-#define USB_CLR_SOF (~USB_ISTR_SOF) /*!< clear Start Of Frame bit */
-#define USB_CLR_ESOF (~USB_ISTR_ESOF) /*!< clear Expected Start Of Frame bit */
-
-/* Legacy defines */
-#define USB_CLR_PMAOVRM USB_CLR_PMAOVR
-
-/************************* CNTR control register bits definitions ***********/
-#define USB_CNTR_CTRM ((uint16_t)0x8000U) /*!< Correct TRansfer Mask */
-#define USB_CNTR_PMAOVR ((uint16_t)0x4000U) /*!< DMA OVeR/underrun Mask */
-#define USB_CNTR_ERRM ((uint16_t)0x2000U) /*!< ERRor Mask */
-#define USB_CNTR_WKUPM ((uint16_t)0x1000U) /*!< WaKe UP Mask */
-#define USB_CNTR_SUSPM ((uint16_t)0x0800U) /*!< SUSPend Mask */
-#define USB_CNTR_RESETM ((uint16_t)0x0400U) /*!< RESET Mask */
-#define USB_CNTR_SOFM ((uint16_t)0x0200U) /*!< Start Of Frame Mask */
-#define USB_CNTR_ESOFM ((uint16_t)0x0100U) /*!< Expected Start Of Frame Mask */
-#define USB_CNTR_RESUME ((uint16_t)0x0010U) /*!< RESUME request */
-#define USB_CNTR_FSUSP ((uint16_t)0x0008U) /*!< Force SUSPend */
-#define USB_CNTR_LPMODE ((uint16_t)0x0004U) /*!< Low-power MODE */
-#define USB_CNTR_PDWN ((uint16_t)0x0002U) /*!< Power DoWN */
-#define USB_CNTR_FRES ((uint16_t)0x0001U) /*!< Force USB RESet */
-
-/* Legacy defines */
-#define USB_CNTR_PMAOVRM USB_CNTR_PMAOVR
-#define USB_CNTR_LP_MODE USB_CNTR_LPMODE
-
-/******************** FNR Frame Number Register bit definitions ************/
-#define USB_FNR_RXDP ((uint16_t)0x8000U) /*!< status of D+ data line */
-#define USB_FNR_RXDM ((uint16_t)0x4000U) /*!< status of D- data line */
-#define USB_FNR_LCK ((uint16_t)0x2000U) /*!< LoCKed */
-#define USB_FNR_LSOF ((uint16_t)0x1800U) /*!< Lost SOF */
-#define USB_FNR_FN ((uint16_t)0x07FFU) /*!< Frame Number */
-
-/******************** DADDR Device ADDRess bit definitions ****************/
-#define USB_DADDR_EF ((uint8_t)0x80U) /*!< USB device address Enable Function */
-#define USB_DADDR_ADD ((uint8_t)0x7FU) /*!< USB device address */
-
-/****************************** Endpoint register *************************/
-#define USB_EP0R USB_BASE /*!< endpoint 0 register address */
-#define USB_EP1R (USB_BASE + 0x04U) /*!< endpoint 1 register address */
-#define USB_EP2R (USB_BASE + 0x08U) /*!< endpoint 2 register address */
-#define USB_EP3R (USB_BASE + 0x0CU) /*!< endpoint 3 register address */
-#define USB_EP4R (USB_BASE + 0x10U) /*!< endpoint 4 register address */
-#define USB_EP5R (USB_BASE + 0x14U) /*!< endpoint 5 register address */
-#define USB_EP6R (USB_BASE + 0x18U) /*!< endpoint 6 register address */
-#define USB_EP7R (USB_BASE + 0x1CU) /*!< endpoint 7 register address */
-/* bit positions */
-#define USB_EP_CTR_RX ((uint16_t)0x8000U) /*!< EndPoint Correct TRansfer RX */
-#define USB_EP_DTOG_RX ((uint16_t)0x4000U) /*!< EndPoint Data TOGGLE RX */
-#define USB_EPRX_STAT ((uint16_t)0x3000U) /*!< EndPoint RX STATus bit field */
-#define USB_EP_SETUP ((uint16_t)0x0800U) /*!< EndPoint SETUP */
-#define USB_EP_T_FIELD ((uint16_t)0x0600U) /*!< EndPoint TYPE */
-#define USB_EP_KIND ((uint16_t)0x0100U) /*!< EndPoint KIND */
-#define USB_EP_CTR_TX ((uint16_t)0x0080U) /*!< EndPoint Correct TRansfer TX */
-#define USB_EP_DTOG_TX ((uint16_t)0x0040U) /*!< EndPoint Data TOGGLE TX */
-#define USB_EPTX_STAT ((uint16_t)0x0030U) /*!< EndPoint TX STATus bit field */
-#define USB_EPADDR_FIELD ((uint16_t)0x000FU) /*!< EndPoint ADDRess FIELD */
-
-/* EndPoint REGister MASK (no toggle fields) */
-#define USB_EPREG_MASK (USB_EP_CTR_RX|USB_EP_SETUP|USB_EP_T_FIELD|USB_EP_KIND|USB_EP_CTR_TX|USB_EPADDR_FIELD)
- /*!< EP_TYPE[1:0] EndPoint TYPE */
-#define USB_EP_TYPE_MASK ((uint16_t)0x0600U) /*!< EndPoint TYPE Mask */
-#define USB_EP_BULK ((uint16_t)0x0000U) /*!< EndPoint BULK */
-#define USB_EP_CONTROL ((uint16_t)0x0200U) /*!< EndPoint CONTROL */
-#define USB_EP_ISOCHRONOUS ((uint16_t)0x0400U) /*!< EndPoint ISOCHRONOUS */
-#define USB_EP_INTERRUPT ((uint16_t)0x0600U) /*!< EndPoint INTERRUPT */
-#define USB_EP_T_MASK ((uint16_t) ~USB_EP_T_FIELD & USB_EPREG_MASK)
-
-#define USB_EPKIND_MASK ((uint16_t) ~USB_EP_KIND & USB_EPREG_MASK) /*!< EP_KIND EndPoint KIND */
- /*!< STAT_TX[1:0] STATus for TX transfer */
-#define USB_EP_TX_DIS ((uint16_t)0x0000U) /*!< EndPoint TX DISabled */
-#define USB_EP_TX_STALL ((uint16_t)0x0010U) /*!< EndPoint TX STALLed */
-#define USB_EP_TX_NAK ((uint16_t)0x0020U) /*!< EndPoint TX NAKed */
-#define USB_EP_TX_VALID ((uint16_t)0x0030U) /*!< EndPoint TX VALID */
-#define USB_EPTX_DTOG1 ((uint16_t)0x0010U) /*!< EndPoint TX Data TOGgle bit1 */
-#define USB_EPTX_DTOG2 ((uint16_t)0x0020U) /*!< EndPoint TX Data TOGgle bit2 */
-#define USB_EPTX_DTOGMASK (USB_EPTX_STAT|USB_EPREG_MASK)
- /*!< STAT_RX[1:0] STATus for RX transfer */
-#define USB_EP_RX_DIS ((uint16_t)0x0000U) /*!< EndPoint RX DISabled */
-#define USB_EP_RX_STALL ((uint16_t)0x1000U) /*!< EndPoint RX STALLed */
-#define USB_EP_RX_NAK ((uint16_t)0x2000U) /*!< EndPoint RX NAKed */
-#define USB_EP_RX_VALID ((uint16_t)0x3000U) /*!< EndPoint RX VALID */
-#define USB_EPRX_DTOG1 ((uint16_t)0x1000U) /*!< EndPoint RX Data TOGgle bit1 */
-#define USB_EPRX_DTOG2 ((uint16_t)0x2000U) /*!< EndPoint RX Data TOGgle bit1 */
-#define USB_EPRX_DTOGMASK (USB_EPRX_STAT|USB_EPREG_MASK)
-
-
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
@@ -184,26 +76,26 @@ enum { FSDEV_IRQ_NUM = TU_ARRAY_SIZE(fsdev_irq) };
#error "Unsupported MCU"
#endif
-void dcd_int_enable(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_enable(uint8_t rhport) {
(void)rhport;
for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
NVIC_EnableIRQ(fsdev_irq[i]);
}
}
-void dcd_int_disable(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_disable(uint8_t rhport) {
(void)rhport;
for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
NVIC_DisableIRQ(fsdev_irq[i]);
}
}
-void dcd_disconnect(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_disconnect(uint8_t rhport) {
(void) rhport;
EXTEN->EXTEN_CTR &= ~EXTEN_USBD_PU_EN;
}
-void dcd_connect(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_connect(uint8_t rhport) {
(void) rhport;
EXTEN->EXTEN_CTR |= EXTEN_USBD_PU_EN;
}