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-rw-r--r--test/test/device/msc/test_msc_device.c3
-rw-r--r--test/test/device/usbd/test_usbd.c1
-rw-r--r--test/test/support/tusb_config.h7
-rw-r--r--test/test/test_fifo.c84
4 files changed, 86 insertions, 9 deletions
diff --git a/test/test/device/msc/test_msc_device.c b/test/test/device/msc/test_msc_device.c
index 34bd90c7e..a01ef153a 100644
--- a/test/test/device/msc/test_msc_device.c
+++ b/test/test/device/msc/test_msc_device.c
@@ -66,7 +66,7 @@ uint8_t const data_desc_configuration[] =
TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
// Interface number, string index, EP Out & EP In address, EP size
- TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 0, EDPT_MSC_OUT, EDPT_MSC_IN, (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 512 : 64),
+ TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 0, EDPT_MSC_OUT, EDPT_MSC_IN, TUD_OPT_HIGH_SPEED ? 512 : 64),
};
tusb_control_request_t const request_set_configuration =
@@ -199,7 +199,6 @@ void setUp(void)
if ( !tusb_inited() )
{
dcd_init_Expect(rhport);
- dcd_connect_Expect(rhport);
tusb_init();
}
diff --git a/test/test/device/usbd/test_usbd.c b/test/test/device/usbd/test_usbd.c
index 1bb32c1e5..06372b2e4 100644
--- a/test/test/device/usbd/test_usbd.c
+++ b/test/test/device/usbd/test_usbd.c
@@ -127,7 +127,6 @@ void setUp(void)
{
mscd_init_Expect();
dcd_init_Expect(rhport);
- dcd_connect_Expect(rhport);
tusb_init();
}
}
diff --git a/test/test/support/tusb_config.h b/test/test/support/tusb_config.h
index 5258513ec..80ea0a1ea 100644
--- a/test/test/support/tusb_config.h
+++ b/test/test/support/tusb_config.h
@@ -43,12 +43,7 @@
#define CFG_TUSB_MCU OPT_MCU_NRF5X
#endif
-#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | OPT_MODE_HIGH_SPEED)
-#else
-#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE
-#endif
-
#define CFG_TUSB_OS OPT_OS_NONE
// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
@@ -99,7 +94,7 @@
//------------- HID -------------//
// Should be sufficient to hold ID (if any) + Data
-#define CFG_TUD_HID_BUFSIZE 16
+#define CFG_TUD_HID_EP_BUFSIZE 16
#ifdef __cplusplus
}
diff --git a/test/test/test_fifo.c b/test/test/test_fifo.c
index 2cb8ada91..b6c22f569 100644
--- a/test/test/test_fifo.c
+++ b/test/test/test_fifo.c
@@ -54,6 +54,90 @@ void test_normal(void)
}
}
+void test_item_size(void)
+{
+ TU_FIFO_DEF(ff4, FIFO_SIZE, uint32_t, false);
+ tu_fifo_clear(&ff4);
+
+ uint32_t data[20];
+ for(uint32_t i=0; i<sizeof(data)/4; i++) data[i] = i;
+
+ tu_fifo_write_n(&ff4, data, 10);
+
+ uint32_t rd[10];
+ uint16_t rd_count;
+
+ // read 0 -> 4
+ rd_count = tu_fifo_read_n(&ff4, rd, 5);
+ TEST_ASSERT_EQUAL( 5, rd_count );
+ TEST_ASSERT_EQUAL_UINT32_ARRAY( data, rd, rd_count ); // 0 -> 4
+
+ tu_fifo_write_n(&ff4, data+10, 5);
+
+ // read 5 -> 14
+ rd_count = tu_fifo_read_n(&ff4, rd, 10);
+ TEST_ASSERT_EQUAL( 10, rd_count );
+ TEST_ASSERT_EQUAL_UINT32_ARRAY( data+5, rd, rd_count ); // 5 -> 14
+}
+
+void test_read_n(void)
+{
+ // prepare data
+ uint8_t data[20];
+ for(int i=0; i<sizeof(data); i++) data[i] = i;
+
+ for(uint8_t i=0; i < FIFO_SIZE; i++) tu_fifo_write(&ff, data+i);
+
+ uint8_t rd[10];
+ uint16_t rd_count;
+
+ // case 1: Read index + count < depth
+ // read 0 -> 4
+ rd_count = tu_fifo_read_n(&ff, rd, 5);
+ TEST_ASSERT_EQUAL( 5, rd_count );
+ TEST_ASSERT_EQUAL_MEMORY( data, rd, rd_count ); // 0 -> 4
+
+ // case 2: Read index + count > depth
+ // write 10, 11, 12
+ tu_fifo_write(&ff, data+10);
+ tu_fifo_write(&ff, data+11);
+ tu_fifo_write(&ff, data+12);
+
+ rd_count = tu_fifo_read_n(&ff, rd, 7);
+ TEST_ASSERT_EQUAL( 7, rd_count );
+
+ TEST_ASSERT_EQUAL_MEMORY( data+5, rd, rd_count ); // 5 -> 11
+
+ // Should only read until empty
+ TEST_ASSERT_EQUAL( 1, tu_fifo_read_n(&ff, rd, 100) );
+}
+
+void test_write_n(void)
+{
+ // prepare data
+ uint8_t data[20];
+ for(int i=0; i<sizeof(data); i++) data[i] = i;
+
+ // case 1: wr + count < depth
+ tu_fifo_write_n(&ff, data, 8); // wr = 8, count = 8
+
+ uint8_t rd[10];
+ uint16_t rd_count;
+
+ rd_count = tu_fifo_read_n(&ff, rd, 5); // wr = 8, count = 3
+ TEST_ASSERT_EQUAL( 5, rd_count );
+ TEST_ASSERT_EQUAL_MEMORY( data, rd, rd_count ); // 0 -> 4
+
+ // case 2: wr + count > depth
+ tu_fifo_write_n(&ff, data+8, 6); // wr = 3, count = 9
+
+ for(rd_count=0; rd_count<7; rd_count++) tu_fifo_read(&ff, rd+rd_count); // wr = 3, count = 2
+
+ TEST_ASSERT_EQUAL_MEMORY( data+5, rd, rd_count); // 5 -> 11
+
+ TEST_ASSERT_EQUAL(2, tu_fifo_count(&ff));
+}
+
void test_peek(void)
{
uint8_t temp;