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path: root/hw/bsp/samg55xplained
AgeCommit message (Expand)Author
2024-05-04add cmake for samg55hathach
2024-04-24fix samd linker with clang: cannot self-check defined symbol with lld e.g `ST...hathach
2023-11-23make nanolib linking explicitly by each family/boardhathach
2023-08-03more board_api.h renamehathach
2023-03-19add CFLAGS_SKIP to improve sam compile timehathach
2023-03-17fix trailing space and new linehathach
2023-03-16rename FREERTOS_PORT to FREERTOS_PORTABLE_SRChathach
2023-03-08Merge branch 'master' into renesas-rahathach
2022-06-29fix buid_board.py scripthathach
2022-06-06fix ci, remove use of CFG_TUSB_RHPORT0_MODE in bsphathach
2022-06-02rework make freertos port handlingRafael Silva
2021-10-18enable -Wnull-dereferencehathach
2021-10-17more -Wcast-qualhathach
2021-03-18add example specific DEPS_SUBMODULEShathach
2021-03-17explicitly add dcd source file without vendor/familyhathach
2021-03-04rename FAMILY_SUBMODULES to DEPS_SUBMODULEShathach
2021-03-04merge no-family example buildhathach
2021-01-26change output filename to BOARD-Directoryhathach
2020-11-09same70 xplained uart via edbg work with board_testhathach
2020-10-08clean up jlink default interfacehathach
2020-09-04update dochathach
2020-08-21fix samg55 ci buildhathach
2020-04-17mass rename tud/dcd_irq_handler to tud/dcd_init_handlerhathach
2020-04-06mass rename tud_isr to tud_irq_handlerhathach
2020-03-11hack to undef LITTLE_ENDIAN for samg55hathach
2020-03-11freertos demo use static only for most optmized sramhathach
2020-03-09Adding lwip_webserver to cihathach
2019-12-09implementing dcd_edpt_openhathach
2019-11-27detect bus resethathach
2019-11-27clean uphathach
2019-11-26add uart sync supporthathach
2019-11-26fix samg55 with newlib missing end symbolhathach
2019-11-25updatehathach
2019-11-24usb hw init OKhathach
2019-11-04clean uphathach
2019-11-04clean uphathach
2019-11-04board test workshathach