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AgeCommit message (Expand)Author
2025-09-29Merge branch 'master' into fork/ennebi/mtphathach
2025-09-27Merge pull request #3256 from hathach/weak_cbHa Thach
2025-09-22Fix erroneous documentation of TU_ASSERT/TU_VERIFYTerje Runde
2025-09-19rework get storageIDs and get storage infohathach
2025-09-17Update weak callbacks to new syntaxHiFiPhile
2025-09-17use existing overloadable Pico SDK section macro instead of creating a custom...Peter Lawrence
2025-09-16Add ESP32-H4 as a supported MCU in TinyUSB and wire it into build/runtime:igor.masar
2025-09-15dwc2: wait for ahb idle before core resethathach
2025-09-10Initial STM32WBARI eval supportDalton Caron
2025-09-10Merge pull request #3126 from salkinium/fix/phyc_pllHa Thach
2025-09-10use tusb_time_delay_ms_api for delay, also move tusb_time api to common.hhathach
2025-09-03Fix obsolete cnt assignment in _tu_fifo_peek() overflow checkcopilot-swe-agent[bot]
2025-08-15Add ESP32-C5 and ESP32-C61 definitionsScott Shawcroft
2025-08-05Fix AT32F405xx missing USB HS definitionpeppapighs
2025-08-02Merge pull request #3183 from rppicomidi/fix_3159Ha Thach
2025-08-02use tu_desc_in_bounds() for descriptor loophathach
2025-08-01Merge pull request #3191 from hathach/at32Ha Thach
2025-07-07Merge pull request #2963 from HiFiPhile/stm32_cacheHa Thach
2025-07-07change CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT (not defined) to 1hathach
2025-07-07support at32 mcuzhiqiang
2025-07-05Use DMA enable for DCache conditionHiFiPhile
2025-07-05always define CFG_TUH_WCH_USBIP_USBFS=1 for ch32v20x since only port1 support...hathach
2025-07-03Merge branch 'master' into fork/HiFiPhile/stm32_cachehathach
2025-06-20usbh make TU_API_SYNC() public, to implement sync() API, change return of syn...hathach
2025-06-18usbh: add new API tuh_descriptor_get_device_local()hathach
2025-06-13Add cache line size alignment to buffer macroHiFiPhile
2025-06-13Add STM32 DWC2 cache supportHiFiPhile
2025-06-12merge n6 and h7rs (same config)hathach
2025-06-04chore: squash previous commits from other branchesJames Sandison
2025-05-19dwc2 only enter critical in isr with multiple core CPUshathach
2025-05-16follow up to pr3118, interface also end with IAD. Add more checkshathach
2025-04-18enum For string descriptor (langid, manufacturer product, serila): always get...hathach
2025-03-24device cdc: rename tud_cdc_configure_fifo/_t to tud_cdc_configure/_thathach
2025-03-06hack: force/overwrite endpoint mps to 64 for device that incorrectly report 5...hathach
2025-03-06midi host: skip rx data with all zeroeshathach
2025-03-05Merge branch 'master' into fork/atoktoto/midihosthathach
2025-03-03- add tuh_descriptor_get_string_langid() APIhathach
2025-02-24add tuh_midi_descriptor_cb()hathach
2025-02-21Merge branch 'master' into fork/atoktoto/midihosthathach
2025-02-17usbh always retry control transfer (max 3) in case of XFER_RESULT_FAILED.hathach
2025-02-13update midi host to use endpoint stream APIhathach
2024-12-17enable CFG_TUD/THU_MEM_DCACHE_ENABLE for imxrt with M7 by defaulthathach
2024-11-28made change per reviews, remove dcd_edpt_close(), rename and move thing aroundhathach
2024-11-28Merge branch 'master' into fork/pschatzmann/rp2040-isohathach
2024-11-27Add support for the STM32C0 and the NUCLEO-C071RB.David (Pololu)
2024-11-27Fix missing protoype warning, change TUD_EPBUF_TYPE_DEF order (#2889)Ha Thach
2024-11-27default CFG_TUH_DWC2_DMA_ENABLE to 0hathach
2024-11-27update device_info example to work with p4 dcachehathach
2024-11-26msc host work ok with p4 dmahathach
2024-11-25change dcd_dcache_*() API return type from void to boolhathach
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-13 21:26:30 +0000