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AgeCommit message (Expand)Author
2026-07-19add assert to dcd_edpt_iso_allocHiFiPhile
2026-07-20return false on too large ep sizesJie Feng
2026-07-19misc fixesJie Feng
2026-07-19add to docsJie Feng
2026-07-19cleanupJie Feng
2026-07-19add py32f0 supportJie Feng
2026-07-09dcd(musb): flush TX FIFO on halt; don't load a disarmed pipehathach
2026-07-02license: use SPDX identifiers for src/ headers (#3749)Ha Thach
2026-06-16dcd/musb: extract pipe0_data_stage_done() and fix two EP0 commentshathach
2026-06-15dcd/musb: rename pipe0_process_status_isr -> pipe0_process_xfer_state_isrhathach
2026-06-15dcd/musb: harden EP0 DATA_OUT against short packet and host overrunhathach
2026-06-15dcd/musb: read EP0 SETUP into uint32_t[2], drop the double copyhathach
2026-06-15dcd/musb: extract pipe0_process_status_isr() to de-dup EP0 tail pathshathach
2026-06-15dcd/musb: suffix ISR-context process_* handlers with _isrhathach
2026-06-15dcd/musb: end EP0 IN data stage on short packet, split DATA casehathach
2026-06-15dcd/musb: name pipe0_state_t, use local pointer, group struct fieldshathach
2026-06-13dcd/musb: clear rxrdy_consumed when stalling EP0hathach
2026-06-13dcd/musb: replay deferred SETUP instead of stalling EP0hathach
2026-06-13dcd/musb: gate stale EP0 RXRDY interrupts with rxrdy_consumedhathach
2026-06-13dcd/musb: fix deferred-SETUP replay racing usbd's status callhathach
2026-06-13dcd/musb: check SentStall/SetupEnd before DATAEND guardhathach
2026-06-13dcd/musb: replace deferral goto with per-state handlinghathach
2026-06-13dcd/musb: restore EP0 OUT RXRDY flow-control commenthathach
2026-06-13dcd/musb: extract pipe0_read_setup() helperhathach
2026-05-14dcd/musb: defer EP0 SETUP during DATA_IN/STATUS raceHiFiPhile
2026-04-25Merge branch 'master' into musb-followup-3594hathach
2026-04-25separate pipe0 since it is 1 packet per transfer, merge PIPE0 STATUS PENDINGhathach
2026-04-25clean uphathach
2026-04-25musb more ep0 refactor. add back remaining_ctrl for correct ep0 state transit...hathach
2026-04-24musb migrate to ep0_state, remove setup packet from dcd datahathach
2026-04-24refactor musb ep0 xferhathach
2026-04-23musb double packet for epouthathach
2026-04-23Merge pull request #3601 from hathach/fix-conversion-warningsHa Thach
2026-04-22musb implement double buffer for txhathach
2026-04-21enable double buffer for tm4chathach
2026-04-21minor clean uphathach
2026-04-21optimize pipe_state_t sram for port with CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY.hathach
2026-04-21refactor interrupt handling and add `pipe_write` to fix IN ZLP issuehathach
2026-04-20improving transfer tracking and adding support for un-armed Rx data handlinghathach
2026-04-17fix some Wconversion warningshathach
2026-04-11Fix musb RXRDY ClearingBrent Kowal
2026-03-18fix hid_generic_inout for TUD_ENDPOINT_ONE_DIRECTION_ONLY MCUshathach
2026-02-06adjust handle_xfer_in logic to simplify ZLP handlinghathach
2026-01-15dcd/musb: fix zlp INHiFiPhile
2026-01-15dcd/musb: fix unaligned castHiFiPhile
2026-01-14dcd/musb: fix IAR buildHiFiPhile
2026-01-14bsp: add TI EK-TM4C1294XLHiFiPhile
2026-01-06enable dedidcated hwfifo for musb with odd access with 16-bit and 8-bithathach
2025-11-26change tu_fifo_buffer_info_t layouthathach
2025-10-22Apply suggestions from code reviewZixun LI
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