| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2024-05-05 | Fix spurious EP0 completion. | HiFiPhile | |
| 2024-04-25 | Change DMA condition. | HiFiPhile | |
| 2024-04-25 | Fix DMA FIFO reservation. | HiFiPhile | |
| 2024-04-25 | Check IN ep count limit. | HiFiPhile | |
| 2024-04-25 | dwc2: add dma support. | HiFiPhile | |
| 2024-04-25 | Disable EPs correctly to clear incomplete transfer. | HiFiPhile | |
| 2024-04-23 | port clang stm32: f1, f2, f3 | hathach | |
| 2024-04-19 | - clang h743 build and run cdc_msc ok | hathach | |
| - switch unit test back to gcc, since path to clang conflict on local setup (x86 and arm) | |||
| 2024-04-16 | minor update to sof | hathach | |
| 2024-04-11 | separate flush tx/rx fifo | hathach | |
| 2024-04-10 | flush fifo in dcd_edpt_close_all() | HiFiPhile | |
| 2024-04-10 | set txfifo empty level to complete and change back fifo tx to normal size | hathach | |
| 2024-04-09 | Merge branch 'master' into dwc2-interrupts | hathach | |
| 2024-04-05 | dwc2: remove fifo free code. | HiFiPhile | |
| 2024-03-31 | minor clean up | hathach | |
| 2024-03-30 | Code refactor. | HiFiPhile | |
| 2024-03-30 | Flush FIFO on bus reset. | HiFiPhile | |
| 2024-03-30 | dwc2: add endpoint allocation support. | HiFiPhile | |
| 2024-02-19 | Opt-out for USB Test-Mode | Rocky04 | |
| 2024-02-15 | Do not enable the Mode mismatch interrupt source, it is not cleared | Chris Desjardins | |
| If this interrupt ever hits it will result in an infinite interrupt loop as it is never cleared. | |||
| 2024-02-01 | Merge branch 'master' into src/portable/synopsys/dwc2/fix_sof_int_handling | HiFiPhile | |
| 2024-01-15 | Merge branch 'master' into test-mode-support | Rocky04 | |
| 2024-01-15 | Change to control complete cb | Rocky04 | |
| 2024-01-15 | Add DWC2 Test Mode SUpport | Rocky04 | |
| 2023-10-31 | dwc2 flush tx,rx fifo in dcd_init() | hathach | |
| 2023-10-31 | usb on u5a5 hs work well with correct VBVALEXTOEN/VBVALOVAL set | hathach | |
| 2023-10-30 | minor space format dwc2 driver | hathach | |
| 2023-05-04 | Use double-sized fifo only for IN endpoints | Michiel van Leeuwen | |
| 2023-04-28 | Check correct interrupt flag | Michiel van Leeuwen | |
| Fixes #1737 | |||
| 2023-04-28 | dwc2: configure fifo size to be twice the max_size | Michiel van Leeuwen | |
| This is needed in order to always be able to fit a packet in the fifo. Writing to the fifo is done from an interrupts that fires when the fifo is half-empty, so the fifo must be twice the packet size. | |||
| 2023-02-27 | synopsys/dwc2: fix SOF interrupt handling | Gunar Schorcht | |
| SOF is not a flag of the GOTGINT register but of the GINTSTS register. Therefore the flag must be written in the GINTSTS register instead of the GOTGINT register to clear the interrupt. | |||
| 2023-01-11 | dwc2: fix IAR warnings. | MasterPhi | |
| 2022-12-04 | Fix typos | Bastien Nocera | |
| 2022-06-04 | update all dwc2 ports to support new dynamic controller support | hathach | |
| 2022-06-03 | make dwc2 stm32 rhport support dynamic | hathach | |
| 2022-06-01 | Merge pull request #1454 from Iktek/bugfix_1453 | Ha Thach | |
| overwrite grstctl on edpt_disable | |||
| 2022-06-01 | grstctl set fifo + flush in one assign | hathach | |
| 2022-05-03 | overwrite grstctl on edpt_disable | Pascal Speck | |
| 2022-03-16 | Fix DSTS_FNSOF in dwc2.c | Reinhard Panhuber | |
| 2022-03-14 | Add SOF callback function for feedback value determination in uac - wip! | Reinhard Panhuber | |
| 2022-03-07 | added dcd_sof_enable() stubs for all other ports | hathach | |
| 2022-02-26 | add TUP_USBIP_DWC2 | hathach | |
| 2022-02-26 | more internal rename | hathach | |
| 2022-02-26 | mcu specific rename | hathach | |
| 2022-02-25 | rename and move dcd_attr.h to tusb_mcu_attr.h | hathach | |
| 2022-02-25 | rename TUSB_OPT_DEVICE_ENABLED to CFG_TUD_ENABLED | hathach | |
| TUSB_OPT_DEVICE_ENABLED still usable for backward compatible | |||
| 2022-01-05 | Add Raspberry Pi Zero W and Zero 2 W | Scott Shawcroft | |
| These are different Broadcom chips. The peripherals are essentially the same. The main differences are: * The CPU(s) * The interrupt controller * The peripheral base address (but not the peripherals that we use) | |||
| 2021-11-17 | clean up | hathach | |
| 2021-11-15 | set DCFG_XCVRDLY when using external ULPI highspeed phy | hathach | |
| 2021-11-05 | xmc4500 ported, cdc msc example run fine | hathach | |
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index : tinyusb.git | |
| Unnamed repository; edit this file 'description' to name the repository. |
| summaryrefslogtreecommitdiff |