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path: root/src/portable/wch
AgeCommit message (Expand)Author
2026-07-12ch32h417: make usbss_phy_cfg return void (unused read-back)worktree-ch569-hydrausb3hathach
2026-07-12ch32h417: fix USB3 fallback storm, SET_ADDRESS deref, status-stage completionhathach
2026-07-12ch32h417: fix USBHS EP0 SETUP re-detect, EP0-OUT toggle, SOF dispatchhathach
2026-07-12ch32h417: add USB3 SuperSpeed dcd with runtime USB2 fallbackhathach
2026-07-12Add WCH CH32H417 family + nanoCH32H417 board (BSP + USB2 HS dcd)hathach
2026-07-09usbtest: skip silicon-impossible cases via bcdDevice quirk flagshathach
2026-07-08Harden the CH56x USB3 EP0 control flowhathach
2026-07-08Add SuperSpeed isochronous support to the CH56x USB3 dcdhathach
2026-07-08Pass the usbtest battery on CH569 at high and SuperSpeedhathach
2026-07-08Merge branch 'usbtest': Linux kernel usbtest battery supporthathach
2026-07-08Reach SuperSpeed-class iperf on CH569 net_lwip_webserverhathach
2026-07-08Tune net_lwip_webserver lwIP memory for SuperSpeed on CH569hathach
2026-07-08Retry CH569 SuperSpeed training and fix net_lwip_webserver EP0 sizehathach
2026-07-07Switch CH569 port to the official openwch/ch569 SDKhathach
2026-07-07Add SuperSpeed support to CDC-NCM and enable iperf on CH569hathach
2026-07-07Enable 4-packet bursts on CH569 SuperSpeed bulk endpointshathach
2026-07-07Add SuperSpeed support to cdc_msc_throughput examplehathach
2026-07-07Add CH569 runtime USB2 fallback, HIL board entry and docshathach
2026-07-07Add CH569 USB3.0 SuperSpeed device driver - TinyUSB's first SuperSpeed porthathach
2026-07-07Add CH569/CH565 family with HydraUSB3 v1 board and USB2 HS dcdhathach
2026-07-06Merge remote-tracking branch 'origin/master' into usbtesthathach
2026-07-06usbtest: support CH32V307 on both USB ports (usbfs + usbhs), 30/30 eachhathach
2026-07-06usbtest: address code-review findings (EP3 iso regression + 9 more)hathach
2026-07-06usbtest: support CH583 — its USBFS does isochronous (30/30)hathach
2026-07-05usbtest: enable CH32V103, drop the CH32 usbfs EP3 iso special bufferhathach
2026-07-05usbtest: support CH32V203 (fsdev + usbfs ports), both pass tier-4 30/30hathach
2026-07-02license: use SPDX identifiers for src/ headers (#3749)Ha Thach
2026-06-22hw/bsp+wch: rename the CH58x family to ch583 and OPT_MCU_CH58X to OPT_MCU_CH583hathach
2026-06-20dcd/wch: drop toggle-mismatched OUT packets on all USBFS variantshathach
2026-06-19dcd/ch58x: preserve the DEV_ADDR general-purpose bit on SET_ADDRESShathach
2026-06-19dcd/ch58x: drop stale EP0 transfer state on SETUPhathach
2026-06-19dcd/ch58x: report bus resume instead of a second suspendhathach
2026-06-19dcd/ch58x: advance EP0 OUT data toggle for multi-packet control transfershathach
2026-06-19dcd/ch58x: keep IRQ masked across the EP-arming RMW in dcd_edpt_xferhathach
2026-06-19dcd/ch58x: complete the EP register map and right-size EP buffershathach
2026-06-18dcd/ch58x: drive CH582/583 with shared dcd_ch32_usbfs.chathach
2026-06-18Merge remote-tracking branch 'origin/master' into add-ch58x-usbfshathach
2026-06-18dcd/ch32_usbfs: support CH32V103 combined endpoint control registerhathach
2026-05-26ch32_usbhs: fix endpoint stall length index and clear-stall responseJie Feng
2026-05-23dcd/ch32x: optmize CTRL reg writing, basically revert e14b0e85HiFiPhile
2026-05-23dcd/ch32hs: refactor transfer flowHiFiPhile
2026-05-23dcd/ch32fs: do not set EP0 to ACK on status completeHiFiPhile
2026-05-23dcd/ch32fs: clear INT flag after processingHiFiPhile
2026-05-23dcd/ch32x : code reformatHiFiPhile
2026-05-23dcd/ch32fs: set EP to NAK earlier to reduce spuroius transferHiFiPhile
2026-05-22dcd/ch32fs: reset EP on clear stallHiFiPhile
2026-05-22dcd/ch32fs: fix ISO IN transferHiFiPhile
2026-05-22dcd/ch32fs: only enable EP0 ACK if no data stage, reduce raceHiFiPhile
2026-05-22dcd/ch32fs: reset EP regs on bus resetHiFiPhile
2026-04-28fix(dcd_ch32_usbfs): fix dropped bulk OUT packets by properly re-arming EP_RX...mickabrig7