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2020-08-03Implement dynamic FIFO RAM allocation according to configuration desc.Reinhard Panhuber
2020-08-02Merge pull request #472 from hathach/fix-msp430-warningHa Thach
fix msp430 gcc 9.2.0 warning
2020-08-01enable pull-up in dcd_init() instead of usbdhathach
2020-08-01Merge pull request #477 from hathach/fix-nrf-unplugg-isr-eventHa Thach
correct isr context for nrf DCD_EVENT_UNPLUGGED
2020-08-01correct isr context for nrf DCD_EVENT_UNPLUGGEDhathach
also rename debug lookup to prevent conflict
2020-07-31Fix synopsys size check for ISO endpointJerzy Kasenberg
Constraint was incorrect for ISO endpoint as stated in TODO.
2020-07-29fix nested extern declaration of 'SystemCoreClock' [-Werror=nested-externs]hathach
2020-07-29fix strict prototypehathach
2020-07-28Merge pull request #454 from me-no-dev/esp32-s2-fifosHa Thach
ESP32-S2: Handle the fact that available EP IN FIFOs are less than the number of available EP INs
2020-07-28Update dcd_esp32s2.cme-no-dev
2020-07-28fix msp430 gcc 9.2.0 warning in #465hathach
2020-07-27Implement dynamic reallocation of RX and TX fifos for EP0.Reinhard Panhuber
Tested with EP0 size 8/16/32/64.
2020-07-26add 'set_EP0_max_pkt_size(...)' and fix EP0 size to 64 bytes after resetReinhard Panhuber
2020-07-23fix samd21 race condition with setup packethathach
reproduced with Adafruit_TinyUSB_ArduinoCore port commit 11d669b4d2a40eb2fc5e51b2a9707a6de9d42363 and SAMD BSP 1.6.1
2020-07-17update actual link speed for spresensehathach
2020-07-16update link speed detection for nuc505hathach
2020-07-16dcd tdi report link speed on resethathach
2020-07-10Merge pull request #456 from me-no-dev/esp32-s2-epin-toHa Thach
ESP32-S2: Detect EP IN Xfer Timeout
2020-07-08change REDUCE_SPEED=0/1 to explicitly SPEED=high/fullhathach
update readme, boards.md to add link to new stm boards
2020-07-05Merge pull request #457 from UweBonnes/add-stm-hsHa Thach
Add stm hs
2020-07-03STM32/OTG_HS: Allow OTG_HS port to run at FS speed.Uwe Bonnes
Add "REDUCE_SPEED=1" to the compile options.
2020-07-03update per reviewhathach
2020-07-03fix NVIC disable typohathach
2020-07-02ESP32-S2: Detect EP IN Xfer Timeoutme-no-dev
In some rare ocasions (bad cable, noise, etc.) data transfer might timeout and hang the endpoint, unless the interrupt flag is cleared. This pull request targets to solve that case.
2020-07-02correct HSE_VALUE in hal_confhathach
- although it is define in CFLAGS, it is worth to correct to be consistent with other build - extract set_speed()
2020-07-02change default port some stm bsphathach
- f769disco default port is highspeed port1 - remove PORT0 on stlink since the board only populated HS connector
2020-07-02clean uphathach
2020-07-01Merge branch 'add-stm-hs' of github.com:hathach/tinyusb into add-stm-hshathach
2020-07-01st/synopsys/dcd_synopsys.c: Remove USBC PHY PLL stabilization delay for nowUwe Bonnes
While the ST code has a 2 ms stabilization delay for the USBC PHY PLL, running without this delay showed no problem for at leat 10 USB un/replug cycles. Observe for problems!
2020-07-01only set turnaround in reset completehathach
2020-07-01correctly set turn around according to cpu clockhathach
help to run with low speed mcu
2020-07-01Merge branch 'master' into add-stm-hshathach
2020-07-01clean up codehathach
2020-07-01ESP32-S2: Handle the fact that available EP IN FIFOs are less than the ↵me-no-dev
number of available EP INs ESP32-S2 has only 5 available endpoint-in FIFOs (including EP0) but 7 available EP IN numbers. This change decouples the fifo number from the endpoint number, providing FIFO numbers until they reach the limit, at which point it will return false and assert an error that too many endpoints were allocated.
2020-06-30Clear ep0_pending if rx short packetJan Dümpelmann
2020-06-30Fix receiving of short packet data (ep out)Jan Dümpelmann
2020-06-30stm32f723disco: USB HS enumerates.Uwe Bonnes
2020-06-30dcd_synopsys: Handle HS and FS IP in one deviceUwe Bonnes
FIXME: Allow run-time selection to allow to handle both HS and FS with one file F746 HS port enumerates with error config 1 interface 2 altsetting 0 bulk endpoint 0x3 has invalid maxpacket 64
2020-06-30Merge branch 'master' into add-stm-hshathach
2020-06-30Merge pull request #427 from kasjer/kasjer/add-da1469x-supportHa Thach
Support for DA1469x MCU from Dialog Semiconductor
2020-06-29Merge pull request #399 from duempel/redesign_synopsys_receiveHa Thach
Improvements to Synopsys EP OUT
2020-06-29Add author name to dcd_synopsys.cJan Dümpelmann
2020-06-26Remove EP0 remaining bytes manipulationJan Dümpelmann
Renaming edpt_xact to edpt_schedule_packets
2020-06-25dcd_samd: Provide implementation for OPT_MCU_SAME5XJeff Epler
2020-06-24added OPT_MCU_SAME5X optionhathach
2020-06-18Add transaction (edpt_xact) as sub transferJan Dümpelmann
A transfer can have one or multiple transactions. Usually only EP0 splits one xfer into multiple xact.
2020-06-18Disable SOF in dcd_stm32_fsdevMengsk
Signed-off-by: Mengsk <[email protected]>
2020-06-17Fix IAR warnings.Mengsk
Pa039 : use of address of unaligned structure member. Pe188: enumerated type mixed with another type.
2020-06-16fix stm32h743 priority with freeRTOShathach
2020-06-15Enhance EP FIFO allocation for both Fullspeed and Highspeedhathach
- Update shared RX FIFO calculation with FS/HS - IN FIFO EP - Interrupt -> use EPSize - Bulk/ISO -> use max(EPSize, remaining-fifo / non-opened-EPIN)
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