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2023-05-19only clean/invalidate dcache on imxrt if memory is not in DTCMhathach
2023-05-18refactor ehci: add attached_buffer for dcache invalidate for IN transferhathach
2023-05-18refactor ehci, since usbh only queue 1 TD per queue headhathach
2023-05-18EHCI more improvementhathach
- more dcache clean/invalidate - extract init_periodic_list() - improve isr list handling
2023-05-18more cache, fix an similar issue with OHCI when removing an queue headhathach
2023-05-18use weak local for dcache function to skip if()hathach
2023-05-18EHCI adding dcahe support, passing enumertaionhathach
2023-05-17renesas: provide default for CFG_TUSB_RHPORT1_MODEMartino Facchin
Should fix CI failure for Renesas RX family
2023-05-17adding hcd_dcache_clean/hcd_dcache_invalidatehathach
2023-05-16fix error on EHCI causes xfer error in non-queued qhd which cause memory faulthathach
2023-05-16usbd: fix control transfer issue for chipidea hs when previous status and ↵hathach
new setup complete in the same isr frame change usbd edpt busy/stalled/claimed value to 0/1 instead of (true/false) since they are 1-bit field.
2023-05-16add various check for disconncted device, also fix #1511 un-roll recursive ↵hathach
hub removal with usbh queue
2023-05-16EHCI: fix xfer failed with disconnected device as stalledhathach
- change CFG_TUH_ENDPOINT_MAX to 16 (max endpoint pair per device) if not defined - change QHD_MAX for EHCI, should be user configurable and more optimized in the future
2023-05-16correct EHCI reporting failed xfer (instead of stalled) when device is unpluggedhathach
2023-05-10allow imxrt build with dual exmapleshathach
2023-05-09fix ehci issue with portsc when enable port power and port resethathach
fix attached device not regconized if attached before power on
2023-05-08build host examples with imxhathach
2023-05-07update all device cmake example for imxhathach
2023-05-06cmake work well with imxrthathach
2023-05-05more temp workhathach
2023-05-04wiphathach
2023-05-04Use double-sized fifo only for IN endpointsMichiel van Leeuwen
2023-05-03renesas: add fallback for targets not defining CFG_TUSB_RHPORT*_MODEMartino Facchin
2023-05-03renesas_ra: support RA2A1 (FS only)Martino Facchin
2023-05-03renesas_ra: host: handle retry on attach()Martino Facchin
2023-05-03renesas_ra: add support for HS portMartino Facchin
2023-04-28more update to host serial APIhathach
2023-04-28allow call tuh cdc with blocking (callback = NULL)hathach
- tuh_cdc_set_control_line_state() - tuh_cdc_set_baudrate() - tuh_cdc_set_line_coding()
2023-04-28improve host serial drivershathach
- tuh_control_xfer() update xfer result to user_data if complete callback = NULL (sync/blocking) - refactor host serial driver for acm/ftdi/cp210x
2023-04-28Check correct interrupt flagMichiel van Leeuwen
Fixes #1737
2023-04-28dwc2: configure fifo size to be twice the max_sizeMichiel van Leeuwen
This is needed in order to always be able to fit a packet in the fifo. Writing to the fifo is done from an interrupts that fires when the fifo is half-empty, so the fifo must be twice the packet size.
2023-04-28add aligned(4) for cdc_line_coding_thathach
2023-04-27cdc: fix line_coding aligmentJean-Baptiste Theou
While calling tud_cdc_n_get_line_coding, the structure is copied into the destination. Dump of assembler code for function tud_cdc_n_get_line_coding: 0x000193f4 <+0>: mov.w r2, #2112 @ 0x840 0x000193f8 <+4>: ldr r3, [pc, #20] @ (0x19410 <tud_cdc_n_get_line_coding+28>) 0x000193fa <+6>: mla r0, r2, r0, r3 => 0x000193fe <+10>: ldr.w r3, [r0, #6] 0x00019402 <+14>: str r3, [r1, #0] On some platform (tested on LPC55S28), the address needs to be 4-bytes aligned. Without this, the address is (gdb) p &_cdcd_itf.line_coding $3 = (cdc_line_coding_t *) 0x40100006 <_cdcd_itf+6> which leads to a HardFault. With this fix (gdb) p &_cdcd_itf.line_coding $5 = (cdc_line_coding_t *) 0x40100008 <_cdcd_itf+8> and the function can be called properly Signed-off-by: Jean-Baptiste Theou <[email protected]>
2023-04-27add tuh_cdc_set_baudrate()hathach
2023-04-27add code to calculate divisor from baudrate for ftdihathach
2023-04-27clean uphathach
2023-04-27forgot to add cp210x headerhathach
2023-04-27more refactorhathach
2023-04-27cp210x seems to work wellhathach
2023-04-27more host serial refactorhathach
2023-04-27refactor acm functionhathach
2023-04-27refactor ftdi driverhathach
2023-04-27rename ftdi_host to ftdi_siohathach
2023-04-26hacky, but ftdi work with hard code baudrate = 9600hathach
2023-04-24Merge pull request #2013 from tannewt/imx_1042Ha Thach
Handle iMX RT 1042 usb naming
2023-04-24Merge pull request #2039 from hathach/add-cmake-buildHa Thach
Add cmake build
2023-04-24add wip notehathach
2023-04-24minor updatehathach
2023-04-21example run well with cmake for imxrthathach
2023-04-20[rp2040] Make writes to SIE_CTRL aware of concurrent accessJacek Fedorynski
This commit makes it so that when setting the START_TRANS bit in the SIE_CTRL register, along with some other bits, we first set all the other bits, then wait some cycles, and then set the START_TRANS bit. Doing so protects against a situation where the USB controller is reading the register at the same time and gets an incorrect value. This mirrors the procedure already applied to buffer control registers.
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-18 01:41:28 +0000