diff options
| author | Chris Morgan <[email protected]> | 2023-02-13 16:27:35 -0600 |
|---|---|---|
| committer | Kever Yang <[email protected]> | 2023-02-28 18:07:27 +0800 |
| commit | 02cbda2b720c0e2cdc48cd677888d80ca763070a (patch) | |
| tree | f336753be68c8bc6d292cb9606fb38f23a7755f3 | |
| parent | 904b8700f81cbc6a49c4f693744a4d2c6c393d6d (diff) | |
dts: rockchip: px30: add gpio-ranges property to gpio nodes
Add the gpio-ranges property to each GPIO node for use in deriving
the correct bank ID. Note that invoking "gpio status -a" no longer
causes the board to hit a "Synchronous Abort".
Fixes: 537b1a277479 ("rockchip: add px30 devicetrees")
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
| -rw-r--r-- | arch/arm/dts/px30.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi index bfa3580429d..3152bf107db 100644 --- a/arch/arm/dts/px30.dtsi +++ b/arch/arm/dts/px30.dtsi @@ -1366,6 +1366,7 @@ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; clocks = <&pmucru PCLK_GPIO0_PMU>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; @@ -1378,6 +1379,7 @@ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; @@ -1390,6 +1392,7 @@ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; @@ -1402,6 +1405,7 @@ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; |