diff options
| author | Julien Stephan <[email protected]> | 2026-07-15 16:28:52 +0200 |
|---|---|---|
| committer | David Lechner <[email protected]> | 2026-07-29 10:10:10 -0500 |
| commit | 05d109e09b0ba00bf1e2023a108288b20b724f73 (patch) | |
| tree | 5dd9474ec7a5a1017710d77a91b22dab36845ce7 | |
| parent | 7fac0d08441f7d6e917f615c1588579b7db40c31 (diff) | |
clk: mediatek: mt8195: use driver data to store the clock tree
Pass each controller's struct mtk_clk_tree through the driver data and use
the generic probe function for all the MT8195 clock drivers, instead of a
dedicated probe per controller.
The apmixedsys and topckgen controllers keep their own U_BOOT_DRIVER since
they rely on dedicated ops and on the parent bind() callback, but they now
get their tree from the compatible data.
No functional change intended.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/20260715-b4-mtk-clk-cleanup-clock-gate-drivers-v2-24-23e907516010@baylibre.com
Signed-off-by: David Lechner <[email protected]>
| -rw-r--r-- | drivers/clk/mediatek/clk-mt8195.c | 24 |
1 files changed, 10 insertions, 14 deletions
diff --git a/drivers/clk/mediatek/clk-mt8195.c b/drivers/clk/mediatek/clk-mt8195.c index adbcef96e47..809f39fcffc 100644 --- a/drivers/clk/mediatek/clk-mt8195.c +++ b/drivers/clk/mediatek/clk-mt8195.c @@ -1603,16 +1603,6 @@ static const struct mtk_clk_tree mt8195_infracfg_ao_clk_tree = { .num_gates = ARRAY_SIZE(infra_ao_clks), }; -static int mt8195_apmixedsys_probe(struct udevice *dev) -{ - return mtk_common_clk_init(dev, &mt8195_apmixedsys_clk_tree); -} - -static int mt8195_topckgen_probe(struct udevice *dev) -{ - return mtk_common_clk_init(dev, &mt8195_topckgen_clk_tree); -} - static int mt8195_clk_probe(struct udevice *dev) { const struct mtk_clk_tree *tree = (void *)dev_get_driver_data(dev); @@ -1621,12 +1611,18 @@ static int mt8195_clk_probe(struct udevice *dev) } static const struct udevice_id mt8195_apmixed[] = { - { .compatible = "mediatek,mt8195-apmixedsys", }, + { + .compatible = "mediatek,mt8195-apmixedsys", + .data = (ulong)&mt8195_apmixedsys_clk_tree, + }, { } }; static const struct udevice_id mt8195_topckgen_compat[] = { - { .compatible = "mediatek,mt8195-topckgen", }, + { + .compatible = "mediatek,mt8195-topckgen", + .data = (ulong)&mt8195_topckgen_clk_tree, + }, { } }; @@ -1643,7 +1639,7 @@ U_BOOT_DRIVER(mt8195_clk_apmixedsys) = { .id = UCLASS_CLK, .of_match = mt8195_apmixed, .bind = mtk_common_clk_parent_bind, - .probe = mt8195_apmixedsys_probe, + .probe = mt8195_clk_probe, .priv_auto = sizeof(struct mtk_clk_priv), .ops = &mtk_clk_apmixedsys_ops, .flags = DM_FLAG_PRE_RELOC, @@ -1654,7 +1650,7 @@ U_BOOT_DRIVER(mt8195_clk_topckgen) = { .id = UCLASS_CLK, .of_match = mt8195_topckgen_compat, .bind = mtk_common_clk_parent_bind, - .probe = mt8195_topckgen_probe, + .probe = mt8195_clk_probe, .priv_auto = sizeof(struct mtk_clk_priv), .ops = &mtk_clk_topckgen_ops, .flags = DM_FLAG_PRE_RELOC, |