diff options
| author | Quentin Schulz <[email protected]> | 2026-04-23 16:05:13 +0200 |
|---|---|---|
| committer | Quentin Schulz <[email protected]> | 2026-07-09 20:25:10 +0200 |
| commit | 07ab38e11f56b687ef40fa8c62de5556ae645a26 (patch) | |
| tree | 194101a0d59784258d29e3609a0ca2bbef14e77b | |
| parent | 3a8b3cdd83a3247d23f59f8c75eaf4e917b7f0b6 (diff) | |
rockchip: fix asm-operand-widths clang warning
CONFIG_COUNTER_FREQUENCY is currently 24000000 for all SoCs, meaning it
fits in a 32b type. For 64b SoCs, it's an issue since the registers are
64b.
clang complains that we're trying to fit a 32b value into a 64b
register:
arch/arm/mach-rockchip/rk3528/rk3528.c:98:45: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
98 | asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
| ^
include/generated/autoconf.h:372:34: note: expanded from macro 'CONFIG_COUNTER_FREQUENCY'
372 | #define CONFIG_COUNTER_FREQUENCY 24000000
| ^
/home/qschulz/work/upstream/u-boot/arch/arm/mach-rockchip/rk3528/rk3528.c:98:32: note: use constraint modifier "w"
98 | asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
| ^~
| %w0
Even though cntfrq_el0[1] is only using the 32b LSB of its 64b, use the
'x' operand modifier[2] to force the value to be 64b and fix the
warning.
[1] https://developer.arm.com/documentation/ddi0601/2026-03/AArch64-Registers/CNTFRQ-EL0--Counter-timer-Frequency-Register?lang=en
[2] https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#AArch64-Operand-Modifiers
Suggested-by: Mark Kettenis <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Quentin Schulz <[email protected]>
| -rw-r--r-- | arch/arm/mach-rockchip/rk3528/rk3528.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3576/rk3576.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3588/rk3588.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-rockchip/rk3528/rk3528.c b/arch/arm/mach-rockchip/rk3528/rk3528.c index f9bfc445b85..a39cb8be9a1 100644 --- a/arch/arm/mach-rockchip/rk3528/rk3528.c +++ b/arch/arm/mach-rockchip/rk3528/rk3528.c @@ -95,7 +95,7 @@ void rockchip_stimer_init(void) if (reg & TIMER_EN) return; - asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY)); + asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY)); writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG); writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG); writel(TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG); diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c index 1def4e87971..e3e93f66395 100644 --- a/arch/arm/mach-rockchip/rk3576/rk3576.c +++ b/arch/arm/mach-rockchip/rk3576/rk3576.c @@ -131,7 +131,7 @@ void rockchip_stimer_init(void) if (reg & TIMER_EN) return; - asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY)); + asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY)); writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG); writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG); writel((TIMER_EN << 16) | TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG); diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c index c8de1a21024..f69792670d0 100644 --- a/arch/arm/mach-rockchip/rk3588/rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c @@ -167,7 +167,7 @@ void rockchip_stimer_init(void) if (reg & TIMER_EN) return; - asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY)); + asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY)); writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG); writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG); writel(TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG); |