diff options
| author | Junhui Liu <[email protected]> | 2026-05-19 20:58:31 +0800 |
|---|---|---|
| committer | Andre Przywara <[email protected]> | 2026-07-27 00:30:08 +0200 |
| commit | 0874f96a2e42dd3e729f4f1432f51fc170b4773f (patch) | |
| tree | 711e5fd29622c8876ab2421708bf91346e2e495d | |
| parent | f8fd33a3647a13683f652d65f48f42478082418b (diff) | |
clk: sunxi: a523: add MBUS_EMAC1 clock gate
The Allwinner sun55i (A523/A527/T527) platform requires the MBUS clock
gate enabled for the gmac1 controller to function. Add the clock gate
definition for CLK_MBUS_EMAC1.
Signed-off-by: Junhui Liu <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
| -rw-r--r-- | drivers/clk/sunxi/clk_a523.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/sunxi/clk_a523.c b/drivers/clk/sunxi/clk_a523.c index 1de95fbaf2f..494ee195599 100644 --- a/drivers/clk/sunxi/clk_a523.c +++ b/drivers/clk/sunxi/clk_a523.c @@ -16,6 +16,7 @@ static struct ccu_clk_gate a523_gates[] = { [CLK_PLL_PERIPH0_200M] = GATE_DUMMY, [CLK_APB1] = GATE_DUMMY, + [CLK_MBUS_EMAC1] = GATE(0x804, BIT(12)), [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)), [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)), [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)), |