diff options
| author | Tom Rini <[email protected]> | 2024-10-03 09:30:37 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2024-10-03 09:30:37 -0600 |
| commit | 08990e2254ffd63ade7f633b78b6573abc9b7e90 (patch) | |
| tree | 6b620c0c551772fa1f21974a960eda272500a470 | |
| parent | 718c225cbcd1543ab973e5d98160d97d2e5817ef (diff) | |
| parent | 1083fa7577e3660c56b1690bb8aab30c6a3ffb25 (diff) | |
Merge patch series "arm: Initial support for Analog Devices SC5xx boards"
Oliver Gaskell <[email protected]> says:
ADSP-SC5xx is a series of ARM-based DSPs.
This comprises the armv7 based SC57x, SC58x and SC594 series, and the
armv8 based SC598.
This patch series includes configurations, init code, and minimal DTs
to enable Analog Devices' evaluation boards for these SoCs to boot
through SPL and into U-Boot Proper, as well as devicetree schemas for
the added DTs.
This patch series depends on ("arm: Add Analog Devices SC5xx Machine
Type") (https://lists.denx.de/pipermail/u-boot/2024-April/552043.html)
50 files changed, 1923 insertions, 29 deletions
@@ -208,7 +208,7 @@ config ENV_VARS_UBOOT_CONFIG config NR_DRAM_BANKS int "Number of DRAM banks" - default 1 if ARCH_SUNXI || ARCH_OWL + default 1 if ARCH_SC5XX || ARCH_SUNXI || ARCH_OWL default 2 if OMAP34XX default 4 help @@ -551,6 +551,7 @@ config SYS_LOAD_ADDR default 0x12000000 if ARCH_MX6 && !(MX6SL || MX6SLL || MX6SX || MX6UL || MX6ULL) default 0x80800000 if ARCH_MX7 default 0x90000000 if FSL_LSCH2 || FSL_LSCH3 + default 0x0 if ARCH_SC5XX help Address in memory to use as the default safe load address. @@ -651,6 +652,11 @@ config TEXT_BASE default 0x2a000000 if MACH_SUN9I default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256 default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64 + default 0x96000000 if ARCH_SC5XX && SC59X_64 + default 0xB2200000 if ARCH_SC5XX && SC59X + default 0x89200000 if ARCH_SC5XX && TARGET_SC584_EZKIT + default 0xC2200000 if ARCH_SC5XX && (TARGET_SC589_EZKIT || TARGET_SC589_MINI) + default 0x82200000 if ARCH_SC5XX && SC57X hex "Text Base" help The address in memory that U-Boot will be copied and executed from diff --git a/MAINTAINERS b/MAINTAINERS index 7ab39d91a55..7aefda93d01 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -601,13 +601,20 @@ M: Ian Roberts <[email protected]> M: Vasileios Bimpikas <[email protected]> M: Utsav Agarwal <[email protected]> M: Arturs Artamonovs <[email protected]> S: Supported T: git https://github.com/analogdevicesinc/lnxdsp-u-boot +F: arch/arm/dts/sc5* F: arch/arm/include/asm/arch-adi/ F: arch/arm/mach-sc5xx/ +F: board/adi/ +F: doc/device-tree-bindings/arm/adi/adi,sc5xx.yaml +F: doc/device-tree-bindings/clock/adi,sc5xx-clocks.yaml +F: doc/device-tree-bindings/timer/adi,sc5xx-gptimer.yaml F: drivers/clk/adi/ F: drivers/serial/serial_adi_uart4.c F: drivers/timer/adi_sc5xx_timer.c +F: include/configs/sc5* F: include/env/adi/ ARM SNAPDRAGON diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 656f588a97c..060636e9e2d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1868,6 +1868,20 @@ config TARGET_LS1046AFRWY config ARCH_SC5XX bool "Analog Devices SC5XX-processor family" + select ADI_SC5XX_TIMER + select DM + select DM_SERIAL + select HAS_CUSTOM_SYS_INIT_SP_ADDR + select PANIC_HANG + select SPL + select SPL_BOOTROM_SUPPORT + select SPL_DM + select SPL_DM_SEQ_ALIAS + select SPL_LIBGENERIC_SUPPORT + select SPL_LIBCOMMON_SUPPORT + select SPL_SKIP_LOWLEVEL_INIT + select SUPPORT_SPL + select TIMER config TARGET_SL28 bool "Support sl28" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b3fe3f3c535..d46f0bda1a8 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1290,6 +1290,15 @@ dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE) += imx8mm-cl-iot-gate-optee.dtb \ imx8mm-cl-iot-gate-ied-tpm0.dtbo \ imx8mm-cl-iot-gate-ied-tpm1.dtbo +dtb-$(CONFIG_TARGET_SC573_EZKIT) += sc573-ezkit.dtb +dtb-$(CONFIG_TARGET_SC584_EZKIT) += sc584-ezkit.dtb +dtb-$(CONFIG_TARGET_SC589_MINI) += sc589-mini.dtb +dtb-$(CONFIG_TARGET_SC589_EZKIT) += sc589-ezkit.dtb +dtb-$(CONFIG_TARGET_SC594_SOM_EZKIT) += sc594-som-ezkit.dtb +dtb-$(CONFIG_TARGET_SC594_SOM_EZLITE) += sc594-som-ezlite.dtb +dtb-$(CONFIG_TARGET_SC598_SOM_EZKIT) += sc598-som-ezkit.dtb +dtb-$(CONFIG_TARGET_SC598_SOM_EZLITE) += sc598-som-ezlite.dtb + ifneq ($(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)$(CONFIG_TARGET_IMX8MP_RSB3720A1_6G),) dtb-y += imx8mp-rsb3720-a1.dtb endif diff --git a/arch/arm/dts/sc573-ezkit.dts b/arch/arm/dts/sc573-ezkit.dts new file mode 100644 index 00000000000..0dc2962618c --- /dev/null +++ b/arch/arm/dts/sc573-ezkit.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +/dts-v1/; + +#include "sc57x.dtsi" + +/ { + model = "ADI SC573-EZKIT"; + compatible = "adi,sc573-ezkit", "adi,sc57x"; +}; diff --git a/arch/arm/dts/sc57x.dtsi b/arch/arm/dts/sc57x.dtsi new file mode 100644 index 00000000000..ddfcae8d190 --- /dev/null +++ b/arch/arm/dts/sc57x.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include "sc5xx.dtsi" + +/ { + gic: interrupt-controller@310b2000 { + compatible = "arm,cortex-a5-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x310B2000 0x1000>, + <0x310B4000 0x100>; + }; +}; + +&timer0 { + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; +}; diff --git a/arch/arm/dts/sc584-ezkit.dts b/arch/arm/dts/sc584-ezkit.dts new file mode 100644 index 00000000000..4ec6bcfb658 --- /dev/null +++ b/arch/arm/dts/sc584-ezkit.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +/dts-v1/; + +#include "sc58x.dtsi" + +/ { + model = "ADI SC584-EZKIT"; + compatible = "adi,sc584-ezkit", "adi,sc58x"; +}; diff --git a/arch/arm/dts/sc589-ezkit.dts b/arch/arm/dts/sc589-ezkit.dts new file mode 100644 index 00000000000..8a1c0ce0862 --- /dev/null +++ b/arch/arm/dts/sc589-ezkit.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +/dts-v1/; + +#include "sc58x.dtsi" + +/ { + model = "ADI SC589-EZKIT"; + compatible = "adi,sc589-ezkit", "adi,sc58x"; +}; diff --git a/arch/arm/dts/sc589-mini.dts b/arch/arm/dts/sc589-mini.dts new file mode 100644 index 00000000000..605f7a17bfc --- /dev/null +++ b/arch/arm/dts/sc589-mini.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +/dts-v1/; + +#include "sc58x.dtsi" + +/ { + model = "ADI SC598-MINI"; + compatible = "adi,sc589-mini", "adi,sc58x"; +}; diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi new file mode 100644 index 00000000000..66145315ab7 --- /dev/null +++ b/arch/arm/dts/sc58x.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include "sc5xx.dtsi" + +/ { + gic: interrupt-controller@310b2000 { + compatible = "arm,cortex-a5-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x310B2000 0x1000>, + <0x310B4000 0x100>; + }; +}; + +&timer0 { + reg = <0x31001004 0x100>, + <0x31001060 0x100>; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; +}; diff --git a/arch/arm/dts/sc594-som-ezkit.dts b/arch/arm/dts/sc594-som-ezkit.dts new file mode 100644 index 00000000000..e744a3a4edb --- /dev/null +++ b/arch/arm/dts/sc594-som-ezkit.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +/dts-v1/; + +#include "sc594-som.dtsi" + +/ { + model = "ADI SC594-SOM-EZKIT"; + compatible = "adi,sc594-som-ezkit", "adi,sc59x"; +}; diff --git a/arch/arm/dts/sc594-som-ezlite.dts b/arch/arm/dts/sc594-som-ezlite.dts new file mode 100644 index 00000000000..7d81b40fe8a --- /dev/null +++ b/arch/arm/dts/sc594-som-ezlite.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +/dts-v1/; + +#include "sc594-som.dtsi" + +/ { + model = "ADI SC594-SOM-EZLITE"; + compatible = "adi,sc594-som-ezlite", "adi,sc59x"; +}; diff --git a/arch/arm/dts/sc594-som.dtsi b/arch/arm/dts/sc594-som.dtsi new file mode 100644 index 00000000000..e15473f8e8f --- /dev/null +++ b/arch/arm/dts/sc594-som.dtsi @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +/dts-v1/; + +#include "sc5xx.dtsi" + +&timer0 { + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; +}; + +&clk { + compatible = "adi,sc594-clocks"; + reg = <0x3108d000 0x1000>, + <0x3108e000 0x1000>, + <0x3108f000 0x1000>; +}; diff --git a/arch/arm/dts/sc598-som-ezkit.dts b/arch/arm/dts/sc598-som-ezkit.dts new file mode 100644 index 00000000000..7289e4d1d54 --- /dev/null +++ b/arch/arm/dts/sc598-som-ezkit.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +/dts-v1/; + +#include "sc598-som.dtsi" + +/ { + model = "ADI SC598-SOM-EZKIT"; + compatible = "adi,sc598-som-ezkit", "adi,sc59x-64"; +}; diff --git a/arch/arm/dts/sc598-som-ezlite.dts b/arch/arm/dts/sc598-som-ezlite.dts new file mode 100644 index 00000000000..fa23b30f86e --- /dev/null +++ b/arch/arm/dts/sc598-som-ezlite.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +/dts-v1/; + +#include "sc598-som.dtsi" + +/ { + model = "ADI SC598-SOM-EZLITE"; + compatible = "adi,sc598-som-ezlite", "adi,sc59x-64"; +}; diff --git a/arch/arm/dts/sc598-som.dtsi b/arch/arm/dts/sc598-som.dtsi new file mode 100644 index 00000000000..8bcc8bb8f1c --- /dev/null +++ b/arch/arm/dts/sc598-som.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +/dts-v1/; + +#include "sc5xx.dtsi" + +/ { + gic: interrupt-controller@31200000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x31200000 0x40000>, /* GIC Dist */ + <0x31240000 0x40000>; /* GICR */ + }; +}; + +&clk { + compatible = "adi,sc598-clocks"; + reg = <0x3108d000 0x1000>, + <0x3108e000 0x1000>, + <0x3108f000 0x1000>, + <0x310a9000 0x1000>; + reg-names = "cgu0", "cgu1", "cdu", "pll3"; +}; + +&timer0 { + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; +}; diff --git a/arch/arm/dts/sc5xx.dtsi b/arch/arm/dts/sc5xx.dtsi new file mode 100644 index 00000000000..3f440dac29f --- /dev/null +++ b/arch/arm/dts/sc5xx.dtsi @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/adi-sc5xx-clock.h> + +/ { + #address-cells = <1>; + #size-cells = <1>; + + clocks { + sys_clkin0: sys_clkin0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + bootph-all; + }; + + sys_clkin1: sys_clkin1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + bootph-all; + }; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + device_type = "soc"; + ranges; + bootph-all; + + timer0: timer@31018000 { + compatible = "adi,sc5xx-gptimer"; + reg = <0x31018004 0x100>, + <0x31018060 0x100>; + status = "okay"; + bootph-all; + }; + + clk: clocks@3108d000 { + reg = <0x3108d000 0x1000>; + #clock-cells = <1>; + clocks = <&sys_clkin0>, <&sys_clkin1>; + clock-names = "sys_clkin0", "sys_clkin1"; + status = "okay"; + bootph-all; + }; + }; +}; diff --git a/arch/arm/mach-sc5xx/Kconfig b/arch/arm/mach-sc5xx/Kconfig index 3846b4fd5b6..30444f04fc4 100644 --- a/arch/arm/mach-sc5xx/Kconfig +++ b/arch/arm/mach-sc5xx/Kconfig @@ -13,46 +13,115 @@ if ARCH_SC5XX +config SYS_VENDOR + default "adi" + +choice + prompt "SC5xx SoC Select" + help + Selects which series of Analog Devices SC5xx chips to support. + config SC57X - bool - select SUPPORT_SPL - select CPU_V7A - select PANIC_HANG + bool "SC57x series" select COMMON_CLK_ADI_SC57X - select TIMER - select ADI_SC5XX_TIMER + select CPU_V7A + select TARGET_SC573_EZKIT config SC58X - bool - select SUPPORT_SPL - select CPU_V7A - select PANIC_HANG + bool "SC58x series" select COMMON_CLK_ADI_SC58X - select TIMER - select ADI_SC5XX_TIMER + select CPU_V7A config SC59X - bool - select SUPPORT_SPL - select CPU_V7A - select PANIC_HANG + bool "SC59x 32-bit series" select COMMON_CLK_ADI_SC594 - select TIMER - select ADI_SC5XX_TIMER - select NOP_PHY + select CPU_V7A + select NOP_PHY if PHY config SC59X_64 - bool - select SUPPORT_SPL - select PANIC_HANG - select MMC_SDHCI_ADMA_FORCE_32BIT + bool "SC59x 64-bit series" select ARM64 - select DM - select DM_SERIAL select COMMON_CLK_ADI_SC598 select GICV3 + select GICV3_SUPPORT_GIC600 select GIC_600_CLEAR_RDPD - select NOP_PHY + select MMC_SDHCI_ADMA_FORCE_32BIT + select NOP_PHY if PHY + +endchoice + +if SC57X + +config TARGET_SC573_EZKIT + bool "Support SC573-EZKIT" + +endif + +if SC58X + +choice + prompt "SC58x board select" + +config TARGET_SC584_EZKIT + bool + prompt "SC584-EZKIT" + select ADI_USE_DDR2 + +config TARGET_SC589_MINI + bool + prompt "SC589-MINI" + +config TARGET_SC589_EZKIT + bool + prompt "SC589-EZKIT" + +endchoice + +endif + +if SC59X + +choice + prompt "SC59x 32-bit board select" + +config TARGET_SC594_SOM_EZLITE + bool + prompt "SC594-SOM with SOMCRR-EZLITE" + select ADI_CARRIER_SOMCRR_EZLITE + +config TARGET_SC594_SOM_EZKIT + bool + prompt "SC594-SOM with SOMCRR-EZKIT" + select ADI_CARRIER_SOMCRR_EZKIT + +endchoice + +endif + +if SC59X_64 + +choice + prompt "SC59x 64-bit board select" + +config TARGET_SC598_SOM_EZLITE + bool + prompt "SC598-SOM with SOMCRR-EZLITE" + select ADI_CARRIER_SOMCRR_EZLITE + +config TARGET_SC598_SOM_EZKIT + bool + prompt "SC598-SOM with SOMCRR-EZKIT" + select ADI_CARRIER_SOMCRR_EZKIT + +endchoice + +endif + +config ADI_IMAGE + string "ADI fitImage type" + help + The image built by the ADI ADSP Linux build system. + Is one of tiny, minimal, full. config SC_BOOT_MODE int "SC5XX boot mode select" @@ -93,10 +162,25 @@ config SC_BOOT_OSPI_SSEL This is the OSPI chip select number to use for booting, Y in the expression `sf probe X:Y` +config SYS_BOOTM_LEN + hex + default 0x1800000 + config SYS_FLASH_BASE hex default 0x60000000 +config SYS_MALLOC_F_LEN + default 0x14000 + +config SYS_LOAD_ADDR + hex + default 0x0 + +config SYS_MALLOC_LEN + hex + default 1048576 + config UART_CONSOLE int default 0 @@ -472,4 +556,13 @@ config PINCTRL_ADI bool default y +source "board/adi/sc598-som-ezkit/Kconfig" +source "board/adi/sc598-som-ezlite/Kconfig" +source "board/adi/sc594-som-ezkit/Kconfig" +source "board/adi/sc594-som-ezlite/Kconfig" +source "board/adi/sc589-ezkit/Kconfig" +source "board/adi/sc589-mini/Kconfig" +source "board/adi/sc584-ezkit/Kconfig" +source "board/adi/sc573-ezkit/Kconfig" + endif diff --git a/arch/arm/mach-sc5xx/Makefile b/arch/arm/mach-sc5xx/Makefile index eeb56c078b3..cac768ba565 100644 --- a/arch/arm/mach-sc5xx/Makefile +++ b/arch/arm/mach-sc5xx/Makefile @@ -11,9 +11,13 @@ obj-y += soc.o init/ obj-$(CONFIG_SC57X) += sc57x.o +obj-$(CONFIG_SC57X) += sc57x-spl.o obj-$(CONFIG_SC58X) += sc58x.o +obj-$(CONFIG_SC58X) += sc58x-spl.o obj-$(CONFIG_SC59X) += sc59x.o +obj-$(CONFIG_SC59X) += sc59x-spl.o obj-$(CONFIG_SC59X_64) += sc59x_64.o +obj-$(CONFIG_SC59X_64) += sc59x_64-spl.o obj-$(CONFIG_SPL_BUILD) += spl.o obj-$(CONFIG_SYSCON) += rcu.o diff --git a/arch/arm/mach-sc5xx/sc57x-spl.c b/arch/arm/mach-sc5xx/sc57x-spl.c new file mode 100644 index 00000000000..28380b89b48 --- /dev/null +++ b/arch/arm/mach-sc5xx/sc57x-spl.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <asm/arch-adi/sc5xx/spl.h> + +// Table 45-16 in SC573 HRM +const struct adi_boot_args adi_rom_boot_args[] = { + // JTAG/no boot + [0] = {0, 0, 0}, + // SPI master, used for qspi as well + [1] = {0x60020000, 0x00040000, 0x00010207}, + // SPI slave + [2] = {0, 0, 0x00000212}, + // UART slave + [3] = {0, 0, 0x00000013}, + // Linkport slave + [4] = {0, 0, 0x00000014}, + // reserved, no boot + [5] = {0, 0, 0}, + // reserved, no boot + [6] = {0, 0, 0}, + // reserved, also no boot + [7] = {0, 0, 0} +}; diff --git a/arch/arm/mach-sc5xx/sc58x-spl.c b/arch/arm/mach-sc5xx/sc58x-spl.c new file mode 100644 index 00000000000..ae809f09e55 --- /dev/null +++ b/arch/arm/mach-sc5xx/sc58x-spl.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <asm/arch-adi/sc5xx/spl.h> + +// Table 53-13 in SC58x HRM +const struct adi_boot_args adi_rom_boot_args[] = { + // JTAG/no boot + [0] = {0, 0, 0}, + // SPI master, used for qspi as well + [1] = {0x60020000, 0x00040000, 0x00010207}, + // SPI slave + [2] = {0, 0, 0x00000212}, + // reserved, no boot + [3] = {0, 0, 0}, + // reserved, no boot + [4] = {0, 0, 0}, + // reserved, also no boot + [5] = {0, 0, 0}, + // Linkport slave + [6] = {0, 0, 0x00000014}, + // UART slave + [7] = {0, 0, 0x00000013}, +}; diff --git a/arch/arm/mach-sc5xx/sc59x-spl.c b/arch/arm/mach-sc5xx/sc59x-spl.c new file mode 100644 index 00000000000..c8fc25fe7c4 --- /dev/null +++ b/arch/arm/mach-sc5xx/sc59x-spl.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <asm/arch-adi/sc5xx/spl.h> + +// Table 45-14 in sc594 HRM +const struct adi_boot_args adi_rom_boot_args[] = { + // JTAG/no boot + [0] = {0, 0, 0}, + // SPI master, used for qspi as well + [1] = {0x60040000, 0x00040000, 0x20620247}, + // SPI slave + [2] = {0, 0, 0x00000212}, + // UART slave + [3] = {0, 0, 0x00000013}, + // Linkport slave + [4] = {0, 0, 0x00000014}, + // OSPI master + [5] = {0x60040000, 0, 0x00000008}, + // reserved, no boot + [6] = {0, 0, 0}, + // reserved, also no boot + [7] = {0, 0, 0} +}; diff --git a/arch/arm/mach-sc5xx/sc59x_64-spl.c b/arch/arm/mach-sc5xx/sc59x_64-spl.c new file mode 100644 index 00000000000..3992538133d --- /dev/null +++ b/arch/arm/mach-sc5xx/sc59x_64-spl.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <asm/arch-adi/sc5xx/spl.h> + +// Table 47-14 in SC598 hardware reference manual +const struct adi_boot_args adi_rom_boot_args[] = { + // JTAG/no boot + [0] = {0, 0, 0}, + // SPI master, used for qspi as well + [1] = {0x60040000, 0x00040000, 0x20620247}, + // SPI slave + [2] = {0, 0, 0x00000212}, + // UART slave + [3] = {0, 0, 0x00000013}, + // Linkport slave + [4] = {0, 0, 0x00000014}, + // OSPI master + [5] = {0x60040000, 0, 0x00000008}, + // eMMC + [6] = {0x201, 0, 0x86009}, + // reserved, also no boot + [7] = {0, 0, 0} +}; diff --git a/arch/arm/mach-sc5xx/sc59x_64.c b/arch/arm/mach-sc5xx/sc59x_64.c index 82537bf1965..001747f223d 100644 --- a/arch/arm/mach-sc5xx/sc59x_64.c +++ b/arch/arm/mach-sc5xx/sc59x_64.c @@ -9,6 +9,7 @@ */ #include <asm/io.h> +#include <asm/armv8/mmu.h> #include <asm/arch-adi/sc5xx/sc5xx.h> #include <asm/arch-adi/sc5xx/spl.h> @@ -24,6 +25,30 @@ #define BITM_SCB5_SPI2_OSPI_REMAP_REMAP 0x00000003 #define ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0 0x00000001 +static struct mm_region sc598_mem_map[] = { + { + /* Peripherals */ + .virt = 0x0UL, + .phys = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* DDR */ + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0x40000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = sc598_mem_map; + adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e4; void sc5xx_enable_rgmii(void) diff --git a/arch/arm/mach-sc5xx/soc.c b/arch/arm/mach-sc5xx/soc.c index 8f13127a660..f3619206e91 100644 --- a/arch/arm/mach-sc5xx/soc.c +++ b/arch/arm/mach-sc5xx/soc.c @@ -172,6 +172,42 @@ void fixup_dp83867_phy(struct phy_device *phydev) phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x3100); } +extern char __bss_start, __bss_end; +extern char __rel_dyn_end; + +void bss_clear(void) +{ + char *bss_start = &__bss_start; + char *bss_end = &__bss_end; + char *rel_dyn_end = &__rel_dyn_end; + + char *start; + + if (rel_dyn_end >= bss_start && rel_dyn_end <= bss_end) + start = rel_dyn_end; + else + start = bss_start; + + u32 *pt; + size_t sz = bss_end - start; + + for (int i = 0; i < sz; i += 4) { + pt = (u32 *)(start + i); + *pt = 0; + } +} + +int board_early_init_f(void) +{ + bss_clear(); + return 0; +} + +int board_init(void) +{ + return 0; +} + int dram_init(void) { gd->ram_size = CFG_SYS_SDRAM_SIZE; diff --git a/board/adi/sc573-ezkit/Kconfig b/board/adi/sc573-ezkit/Kconfig new file mode 100644 index 00000000000..328563c1296 --- /dev/null +++ b/board/adi/sc573-ezkit/Kconfig @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2024 - Analog Devices, Inc. + +if TARGET_SC573_EZKIT + +config SYS_BOARD + default "sc573-ezkit" + +config SYS_CONFIG_NAME + default "sc573-ezkit" + +config LDR_CPU + default "ADSP-SC573-0.0" + +config DEFAULT_DEVICE_TREE + default "sc573-ezkit" + +config ADI_IMAGE + default "tiny" + +config CUSTOM_SYS_INIT_SP_ADDR + default 0x8203f000 + +# SPI Flash + +config SF_DEFAULT_BUS + default 2 + +config SF_DEFAULT_CS + default 1 + +config SF_DEFAULT_SPEED + default 10000000 + +# Clocks + +config CGU0_DF_DIV + default 0 + +config CGU0_VCO_MULT + default 18 + +config CGU0_CCLK_DIV + default 1 + +config CGU0_SCLK_DIV + default 2 + +config CGU0_SCLK0_DIV + default 2 + +config CGU0_SCLK1_DIV + default 2 + +config CGU0_DCLK_DIV + default 2 + +config CGU0_OCLK_DIV + default 3 + +config CGU1_VCO_MULT + default 5 + +config CGU1_DF_DIV + default 0 + +config CGU1_CCLK_DIV + default 1 + +config CGU1_SCLK_DIV + default 2 + +config CGU1_SCLK0_DIV + default 2 + +config CGU1_SCLK1_DIV + default 2 + +config CGU1_DCLK_DIV + default 2 + +config CGU1_OCLK_DIV + default 3 + +config CDU0_CLKO0 + default 1 + +config CDU0_CLKO1 + default 1 + +config CDU0_CLKO2 + default 1 + +config CDU0_CLKO3 + default 1 + +config CDU0_CLKO4 + default 1 + +config CDU0_CLKO5 + default 1 + +config CDU0_CLKO6 + default 1 + +config CDU0_CLKO7 + default 5 + +config CDU0_CLKO8 + default 1 + +config CDU0_CLKO9 + default 1 + +endif diff --git a/board/adi/sc573-ezkit/sc573-ezkit.env b/board/adi/sc573-ezkit/sc573-ezkit.env new file mode 100644 index 00000000000..26f7b6cb799 --- /dev/null +++ b/board/adi/sc573-ezkit/sc573-ezkit.env @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later+ */ + +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <env/adi/adi_boot.env> + +adi_stage2_offset=0x20000 +adi_image_offset=0xE0000 +adi_rfs_offset=0x6E0000 +loadaddr=0x83000000 +jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc573-ezkit.jffs2 diff --git a/board/adi/sc584-ezkit/Kconfig b/board/adi/sc584-ezkit/Kconfig new file mode 100644 index 00000000000..14c47f1d69d --- /dev/null +++ b/board/adi/sc584-ezkit/Kconfig @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2024 - Analog Devices, Inc. + +if TARGET_SC584_EZKIT + +config LDR_CPU + default "ADSP-SC584-0.1" + +config SYS_BOARD + default "sc584-ezkit" + +config SYS_CONFIG_NAME + default "sc584-ezkit" + +config DEFAULT_DEVICE_TREE + default "sc584-ezkit" + +config ADI_IMAGE + default "tiny" + +config CUSTOM_SYS_INIT_SP_ADDR + default 0x8903f000 + +# SPI Flash + +config SF_DEFAULT_BUS + default 2 + +config SF_DEFAULT_CS + default 1 + +config SF_DEFAULT_SPEED + default 5000000 + +# Clocks + +config CGU0_DF_DIV + default 0 + +config CGU0_VCO_MULT + default 18 + +config CGU0_CCLK_DIV + default 1 + +config CGU0_SCLK_DIV + default 2 + +config CGU0_SCLK0_DIV + default 2 + +config CGU0_SCLK1_DIV + default 2 + +config CGU0_DCLK_DIV + default 2 + +config CGU0_OCLK_DIV + default 3 + +config CGU1_VCO_MULT + default 5 + +config CGU1_DF_DIV + default 0 + +config CGU1_CCLK_DIV + default 1 + +config CGU1_SCLK_DIV + default 2 + +config CGU1_SCLK0_DIV + default 2 + +config CGU1_SCLK1_DIV + default 2 + +config CGU1_DCLK_DIV + default 2 + +config CGU1_OCLK_DIV + default 3 + +config CDU0_CLKO0 + default 1 + +config CDU0_CLKO1 + default 1 + +config CDU0_CLKO2 + default 1 + +config CDU0_CLKO3 + default 1 + +config CDU0_CLKO4 + default 1 + +config CDU0_CLKO5 + default 1 + +config CDU0_CLKO6 + default 1 + +config CDU0_CLKO7 + default 5 + +config CDU0_CLKO8 + default 1 + +config CDU0_CLKO9 + default 1 + +endif diff --git a/board/adi/sc584-ezkit/sc584-ezkit.env b/board/adi/sc584-ezkit/sc584-ezkit.env new file mode 100644 index 00000000000..af9a9e01bcf --- /dev/null +++ b/board/adi/sc584-ezkit/sc584-ezkit.env @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later+ */ + +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <env/adi/adi_boot.env> + +adi_stage2_offset=0x20000 +adi_image_offset=0xE0000 +adi_rfs_offset=0x6E0000 +loadaddr=0x89300000 +jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc584-ezkit.jffs2 diff --git a/board/adi/sc589-ezkit/Kconfig b/board/adi/sc589-ezkit/Kconfig new file mode 100644 index 00000000000..b5f555f3a21 --- /dev/null +++ b/board/adi/sc589-ezkit/Kconfig @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2024 - Analog Devices, Inc. + +if TARGET_SC589_EZKIT + +config LDR_CPU + default "ADSP-SC589-0.1" + +config SYS_BOARD + default "sc589-ezkit" + +config SYS_CONFIG_NAME + default "sc589" + +config DEFAULT_DEVICE_TREE + default "sc589-ezkit" + +config ADI_IMAGE + default "tiny" + +config CUSTOM_SYS_INIT_SP_ADDR + default 0xC203f000 + +# SPI Flash + +config SF_DEFAULT_BUS + default 2 + +config SF_DEFAULT_CS + default 1 + +config SF_DEFAULT_SPEED + default 10000000 + +# Clocks + +config CGU0_DF_DIV + default 0 + +config CGU0_VCO_MULT + default 18 + +config CGU0_CCLK_DIV + default 1 + +config CGU0_SCLK_DIV + default 2 + +config CGU0_SCLK0_DIV + default 2 + +config CGU0_SCLK1_DIV + default 2 + +config CGU0_DCLK_DIV + default 1 + +config CGU0_OCLK_DIV + default 3 + +config CGU1_VCO_MULT + default 5 + +config CGU1_DF_DIV + default 0 + +config CGU1_CCLK_DIV + default 1 + +config CGU1_SCLK_DIV + default 2 + +config CGU1_SCLK0_DIV + default 2 + +config CGU1_SCLK1_DIV + default 2 + +config CGU1_DCLK_DIV + default 2 + +config CGU1_OCLK_DIV + default 3 + +config CDU0_CLKO0 + default 1 + +config CDU0_CLKO1 + default 1 + +config CDU0_CLKO2 + default 1 + +config CDU0_CLKO3 + default 1 + +config CDU0_CLKO4 + default 1 + +config CDU0_CLKO5 + default 1 + +config CDU0_CLKO6 + default 1 + +config CDU0_CLKO7 + default 5 + +config CDU0_CLKO8 + default 1 + +config CDU0_CLKO9 + default 1 + +endif diff --git a/board/adi/sc589-ezkit/sc589-ezkit.env b/board/adi/sc589-ezkit/sc589-ezkit.env new file mode 100644 index 00000000000..34b924992ac --- /dev/null +++ b/board/adi/sc589-ezkit/sc589-ezkit.env @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later+ */ + +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <env/adi/adi_boot.env> + +adi_stage2_offset=0x20000 +adi_image_offset=0xE0000 +adi_rfs_offset=0x6E0000 +loadaddr=0xC3000000 +jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc589-ezkit.jffs2 diff --git a/board/adi/sc589-mini/Kconfig b/board/adi/sc589-mini/Kconfig new file mode 100644 index 00000000000..8f723f30dde --- /dev/null +++ b/board/adi/sc589-mini/Kconfig @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2024 - Analog Devices, Inc. + +if TARGET_SC589_MINI + +config LDR_CPU + default "ADSP-SC589-0.1" + +config SYS_BOARD + default "sc589-mini" + +config SYS_CONFIG_NAME + default "sc589" + +config DEFAULT_DEVICE_TREE + default "sc589-mini" + +config ADI_IMAGE + default "minimal" + +config CUSTOM_SYS_INIT_SP_ADDR + default 0xC203f000 + +# SPI Flash + +config SF_DEFAULT_BUS + default 2 + +config SF_DEFAULT_CS + default 1 + +config SF_DEFAULT_SPEED + default 5000000 + +# Clocks + +config CGU0_DF_DIV + default 0 + +config CGU0_VCO_MULT + default 18 + +config CGU0_CCLK_DIV + default 1 + +config CGU0_SCLK_DIV + default 2 + +config CGU0_SCLK0_DIV + default 2 + +config CGU0_SCLK1_DIV + default 2 + +config CGU0_DCLK_DIV + default 1 + +config CGU0_OCLK_DIV + default 3 + +config CGU1_VCO_MULT + default 5 + +config CGU1_DF_DIV + default 0 + +config CGU1_CCLK_DIV + default 1 + +config CGU1_SCLK_DIV + default 2 + +config CGU1_SCLK0_DIV + default 2 + +config CGU1_SCLK1_DIV + default 2 + +config CGU1_DCLK_DIV + default 2 + +config CGU1_OCLK_DIV + default 3 + +config CDU0_CLKO0 + default 1 + +config CDU0_CLKO1 + default 1 + +config CDU0_CLKO2 + default 1 + +config CDU0_CLKO3 + default 1 + +config CDU0_CLKO4 + default 1 + +config CDU0_CLKO5 + default 1 + +config CDU0_CLKO6 + default 1 + +config CDU0_CLKO7 + default 5 + +config CDU0_CLKO8 + default 1 + +config CDU0_CLKO9 + default 1 + +endif diff --git a/board/adi/sc589-mini/sc589-mini.env b/board/adi/sc589-mini/sc589-mini.env new file mode 100644 index 00000000000..0f3f0bd28e9 --- /dev/null +++ b/board/adi/sc589-mini/sc589-mini.env @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later+ */ + +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <env/adi/adi_boot.env> + +adi_stage2_offset=0x20000 +adi_image_offset=0xE0000 +adi_rfs_offset=0x8E0000 +loadaddr=0xC3000000 +jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc589-mini.jffs2 diff --git a/board/adi/sc594-som-ezkit/Kconfig b/board/adi/sc594-som-ezkit/Kconfig new file mode 100644 index 00000000000..ff9231b393c --- /dev/null +++ b/board/adi/sc594-som-ezkit/Kconfig @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2024 - Analog Devices, Inc. + +if TARGET_SC594_SOM_EZKIT + +config LDR_CPU + default "ADSP-SC594-0.0" + +config SYS_BOARD + default "sc594-som-ezkit" + +config SYS_CONFIG_NAME + default "sc594-som" + +config DEFAULT_DEVICE_TREE + default "sc594-som-ezkit" + +config ADI_IMAGE + default "minimal" + +config CUSTOM_SYS_INIT_SP_ADDR + default 0xA003f000 + +# SPL + +config SPL_OF_LIBFDT_ASSUME_MASK + default 0x0 + +# SPI Flash + +config SF_DEFAULT_BUS + default 2 + +config SF_DEFAULT_CS + default 1 + +config SF_DEFAULT_SPEED + default 10000000 + +# Clocks + +config CGU0_DF_DIV + default 0 + +config CGU0_VCO_MULT + default 80 + +config CGU0_CCLK_DIV + default 2 + +config CGU0_SCLK_DIV + default 4 + +config CGU0_SCLK0_DIV + default 4 + +config CGU0_SCLK1_DIV + default 2 + +config CGU0_DCLK_DIV + default 2 + +config CGU0_OCLK_DIV + default 16 + +config CGU0_DIV_S1SELEX + default 6 + +config CGU1_VCO_MULT + default 64 + +config CGU1_DF_DIV + default 0 + +config CGU1_CCLK_DIV + default 2 + +config CGU1_SCLK_DIV + default 4 + +config CGU1_SCLK0_DIV + default 4 + +config CGU1_SCLK1_DIV + default 2 + +config CGU1_DCLK_DIV + default 2 + +config CGU1_OCLK_DIV + default 16 + +config CGU1_DIV_S1SELEX + default 6 + +config CDU0_CLKO0 + default 1 + +config CDU0_CLKO1 + default 1 + +config CDU0_CLKO2 + default 1 + +config CDU0_CLKO3 + default 3 + +config CDU0_CLKO4 + default 3 + +config CDU0_CLKO5 + default 1 + +config CDU0_CLKO6 + default 1 + +config CDU0_CLKO7 + default 1 + +config CDU0_CLKO8 + default 3 + +config CDU0_CLKO9 + default 1 + +config CDU0_CLKO10 + default 1 + +config CDU0_CLKO12 + default 1 + +endif diff --git a/board/adi/sc594-som-ezkit/sc594-som-ezkit.env b/board/adi/sc594-som-ezkit/sc594-som-ezkit.env new file mode 100644 index 00000000000..83d6b457a08 --- /dev/null +++ b/board/adi/sc594-som-ezkit/sc594-som-ezkit.env @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later+ */ + +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <env/adi/adi_boot.env> + +adi_stage2_offset=0x40000 +adi_image_offset=0x0120000 +adi_rfs_offset=0x1020000 +loadaddr=0xA2000000 +jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc594-som-ezkit.jffs2 diff --git a/board/adi/sc594-som-ezlite/Kconfig b/board/adi/sc594-som-ezlite/Kconfig new file mode 100644 index 00000000000..70436955b66 --- /dev/null +++ b/board/adi/sc594-som-ezlite/Kconfig @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2024 - Analog Devices, Inc. + +if TARGET_SC594_SOM_EZLITE + +config LDR_CPU + default "ADSP-SC594-0.0" + +config SYS_BOARD + default "sc594-som-ezlite" + +config SYS_CONFIG_NAME + default "sc594-som" + +config DEFAULT_DEVICE_TREE + default "sc594-som-ezlite" + +config ADI_IMAGE + default "minimal" + +config CUSTOM_SYS_INIT_SP_ADDR + default 0x8203f000 + +# SPL + +config SPL_OF_LIBFDT_ASSUME_MASK + default 0x0 + +# SPI Flash + +config SF_DEFAULT_BUS + default 2 + +config SF_DEFAULT_CS + default 1 + +config SF_DEFAULT_SPEED + default 10000000 + +# Clocks + +config CGU0_DF_DIV + default 0 + +config CGU0_VCO_MULT + default 80 + +config CGU0_CCLK_DIV + default 2 + +config CGU0_SCLK_DIV + default 4 + +config CGU0_SCLK0_DIV + default 4 + +config CGU0_SCLK1_DIV + default 2 + +config CGU0_DCLK_DIV + default 2 + +config CGU0_OCLK_DIV + default 16 + +config CGU0_DIV_S1SELEX + default 6 + +config CGU1_VCO_MULT + default 64 + +config CGU1_DF_DIV + default 0 + +config CGU1_CCLK_DIV + default 2 + +config CGU1_SCLK_DIV + default 4 + +config CGU1_SCLK0_DIV + default 4 + +config CGU1_SCLK1_DIV + default 2 + +config CGU1_DCLK_DIV + default 2 + +config CGU1_OCLK_DIV + default 16 + +config CGU1_DIV_S1SELEX + default 6 + +config CDU0_CLKO0 + default 1 + +config CDU0_CLKO1 + default 1 + +config CDU0_CLKO2 + default 1 + +config CDU0_CLKO3 + default 3 + +config CDU0_CLKO4 + default 3 + +config CDU0_CLKO5 + default 1 + +config CDU0_CLKO6 + default 1 + +config CDU0_CLKO7 + default 1 + +config CDU0_CLKO8 + default 3 + +config CDU0_CLKO9 + default 1 + +config CDU0_CLKO10 + default 1 + +config CDU0_CLKO12 + default 1 + +endif diff --git a/board/adi/sc594-som-ezlite/sc594-som-ezlite.env b/board/adi/sc594-som-ezlite/sc594-som-ezlite.env new file mode 100644 index 00000000000..152e1f14fdf --- /dev/null +++ b/board/adi/sc594-som-ezlite/sc594-som-ezlite.env @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later+ */ + +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <env/adi/adi_boot.env> + +adi_stage2_offset=0x40000 +adi_image_offset=0x0120000 +adi_rfs_offset=0x1020000 +loadaddr=0xA2000000 +jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc594-som-ezlite.jffs2 diff --git a/board/adi/sc598-som-ezkit/Kconfig b/board/adi/sc598-som-ezkit/Kconfig new file mode 100644 index 00000000000..9abecbe1dde --- /dev/null +++ b/board/adi/sc598-som-ezkit/Kconfig @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2024 - Analog Devices, Inc. + +if TARGET_SC598_SOM_EZKIT + +config LDR_CPU + default "ADSP-SC598-0.0" + +config SYS_BOARD + default "sc598-som-ezkit" + +config SYS_CONFIG_NAME + default "sc598-som" + +config DEFAULT_DEVICE_TREE + default "sc598-som-ezkit" + +config ADI_IMAGE + default "minimal" + +config CUSTOM_SYS_INIT_SP_ADDR + default 0x96000000 + +# SPL + +config SPL_OF_LIBFDT_ASSUME_MASK + default 0x0 + +# SPI Flash + +config SF_DEFAULT_BUS + default 2 + +config SF_DEFAULT_CS + default 1 + +config SF_DEFAULT_SPEED + default 10000000 + +# Clock Configs + +config CGU0_DF_DIV + default 0 + +config CGU0_VCO_MULT + default 80 + +config CGU0_CCLK_DIV + default 2 + +config CGU0_SCLK_DIV + default 4 + +config CGU0_SCLK0_DIV + default 4 + +config CGU0_SCLK1_DIV + default 2 + +config CGU0_DCLK_DIV + default 3 + +config CGU0_OCLK_DIV + default 8 + +config CGU0_DIV_S1SELEX + default 6 + +config CGU1_VCO_MULT + default 72 + +config CGU1_DF_DIV + default 0 + +config CGU1_CCLK_DIV + default 16 + +config CGU1_SCLK_DIV + default 8 + +config CGU1_SCLK0_DIV + default 4 + +config CGU1_SCLK1_DIV + default 2 + +config CGU1_DCLK_DIV + default 18 + +config CGU1_OCLK_DIV + default 16 + +config CGU1_DIV_S0SELEX + default 36 + +config CGU1_DIV_S1SELEX + default 90 + +endif diff --git a/board/adi/sc598-som-ezkit/sc598-som-ezkit.env b/board/adi/sc598-som-ezkit/sc598-som-ezkit.env new file mode 100644 index 00000000000..242436c1600 --- /dev/null +++ b/board/adi/sc598-som-ezkit/sc598-som-ezkit.env @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later+ */ + +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <env/adi/adi_boot.env> + +adi_stage2_offset=0x40000 +adi_image_offset=0x01a0000 +adi_rfs_offset=0x1020000 +loadaddr=0x90000000 +jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc598-som-ezkit.jffs2 diff --git a/board/adi/sc598-som-ezlite/Kconfig b/board/adi/sc598-som-ezlite/Kconfig new file mode 100644 index 00000000000..3312316ebdf --- /dev/null +++ b/board/adi/sc598-som-ezlite/Kconfig @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2024 - Analog Devices, Inc. + +if TARGET_SC598_SOM_EZLITE + +config LDR_CPU + default "ADSP-SC598-0.0" + +config SYS_BOARD + default "sc598-som-ezlite" + +config SYS_CONFIG_NAME + default "sc598-som" + +config DEFAULT_DEVICE_TREE + default "sc598-som-ezlite" + +config ADI_IMAGE + default "minimal" + +config CUSTOM_SYS_INIT_SP_ADDR + default 0x96000000 + +# SPL + +config SPL_OF_LIBFDT_ASSUME_MASK + default 0x0 + +# SPI Flash + +config SF_DEFAULT_BUS + default 2 + +config SF_DEFAULT_CS + default 1 + +config SF_DEFAULT_SPEED + default 10000000 + +# Clock Configs + +config CGU0_DF_DIV + default 0 + +config CGU0_VCO_MULT + default 80 + +config CGU0_CCLK_DIV + default 2 + +config CGU0_SCLK_DIV + default 4 + +config CGU0_SCLK0_DIV + default 4 + +config CGU0_SCLK1_DIV + default 2 + +config CGU0_DCLK_DIV + default 3 + +config CGU0_OCLK_DIV + default 8 + +config CGU0_DIV_S1SELEX + default 6 + +config CGU1_VCO_MULT + default 72 + +config CGU1_DF_DIV + default 0 + +config CGU1_CCLK_DIV + default 16 + +config CGU1_SCLK_DIV + default 8 + +config CGU1_SCLK0_DIV + default 4 + +config CGU1_SCLK1_DIV + default 2 + +config CGU1_DCLK_DIV + default 18 + +config CGU1_OCLK_DIV + default 16 + +config CGU1_DIV_S0SELEX + default 36 + +config CGU1_DIV_S1SELEX + default 90 + +endif diff --git a/board/adi/sc598-som-ezlite/sc598-som-ezlite.env b/board/adi/sc598-som-ezlite/sc598-som-ezlite.env new file mode 100644 index 00000000000..036c9ae7590 --- /dev/null +++ b/board/adi/sc598-som-ezlite/sc598-som-ezlite.env @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later+ */ + +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#include <env/adi/adi_boot.env> + +adi_stage2_offset=0x40000 +adi_image_offset=0x01a0000 +adi_rfs_offset=0x1020000 +loadaddr=0x90000000 +jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc598-som-ezlite.jffs2 diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 137f94a1681..c9a6d8410ed 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -87,6 +87,8 @@ config SPL_MAX_SIZE default 0x5fa0 if SUNXI_SRAM_ADDRESS = 0x0 default 0x10000 if ASPEED_AST2600 default 0x27000 if IMX8MM && SPL_TEXT_BASE = 0x7E1000 + default 0x30000 if ARCH_SC5XX && (SC59X_64 || SC59X) + default 0x20000 if ARCH_SC5XX && (SC58X || SC57X) default 0x0 help Maximum size of the SPL image (text, data, rodata, and linker lists @@ -111,7 +113,7 @@ config SPL_PAD_TO config SPL_HAS_BSS_LINKER_SECTION depends on SPL_FRAMEWORK bool "Use a specific address for the BSS via the linker script" - default y if ARCH_SUNXI || ARCH_MX6 || ARCH_OMAP2PLUS || MIPS || RISCV || ARCH_ZYNQMP + default y if ARCH_SUNXI || ARCH_MX6 || ARCH_OMAP2PLUS || MIPS || RISCV || ARCH_ZYNQMP || ARCH_SC5XX config SPL_BSS_START_ADDR hex "Link address for the BSS within the SPL binary" @@ -123,6 +125,9 @@ config SPL_BSS_START_ADDR default 0x4ff80000 if ARCH_SUNXI && !(MACH_SUN9I || MACH_SUNIV) default 0x2ff80000 if ARCH_SUNXI && MACH_SUN9I default 0x1000 if ARCH_ZYNQMP + default 0x200B0000 if ARCH_SC5XX && (SC59X_64 || SC59X) + default 0x20080000 if ARCH_SC5XX && SC58X + default 0x200A0000 if ARCH_SC5XX && SC57X choice prompt "Enforce SPL BSS limit" @@ -151,6 +156,7 @@ config SPL_BSS_MAX_SIZE depends on SPL_BSS_LIMIT default 0x100000 if ARCH_MX6 || RISCV default 0x80000 if ARCH_OMAP2PLUS || ARCH_SUNXI + default 0x10000 if ARCH_SC5XX help When non-zero, the linker checks that the actual memory used by SPL from __bss_start to __bss_end does not exceed it. @@ -270,6 +276,7 @@ config SPL_TEXT_BASE default 0x20060 if SUN50I_GEN_H6 || SUNXI_GEN_NCAT2 default 0x00060 if ARCH_SUNXI default 0xfffc0000 if ARCH_ZYNQMP + default 0x20080000 if ARCH_SC5XX default 0x0 help The address in memory that SPL will be running from. @@ -371,7 +378,7 @@ config SPL_SYS_MALLOC_SIMPLE config SPL_SHARES_INIT_SP_ADDR bool "SPL and U-Boot use the same initial stack pointer location" depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK - default n if ARCH_SUNXI || ARCH_MX6 || ARCH_MX7 + default n if ARCH_SUNXI || ARCH_MX6 || ARCH_MX7 || ARCH_SC5XX default y help In many cases, we can use the same initial stack pointer address for @@ -392,6 +399,9 @@ config SPL_STACK default 0x54000 if MACH_SUN50I || MACH_SUN50I_H5 default 0x18000 if MACH_SUN9I default 0x8000 if ARCH_SUNXI + default 0x200E4000 if ARCH_SC5XX && (SC59X_64 || SC59X) + default 0x200B0000 if ARCH_SC5XX && SC58X + default 0x200D0000 if ARCH_SC5XX && SC57X help Address of the start of the stack SPL will use before SDRAM is initialized. @@ -1134,6 +1144,9 @@ config SPL_PAYLOAD_ARGS_ADDR hex "Address in memory to load 'args' file for Falcon Mode to" depends on SPL_OS_BOOT || SPL_LOAD_FIT_OPENSBI_OS_BOOT default 0x88000000 if ARCH_OMAP2PLUS + default 0x99000000 if ARCH_SC5XX && SC59X_64 + default 0xA0000000 if ARCH_SC5XX && TARGET_SC594_SOM_EZKIT + default 0x80000000 if ARCH_SC5XX && TARGET_SC594_SOM_EZLITE help Address in memory where the 'args' file, typically a device tree will be loaded in to memory. diff --git a/doc/device-tree-bindings/arm/adi/adi,sc5xx.yaml b/doc/device-tree-bindings/arm/adi/adi,sc5xx.yaml new file mode 100644 index 00000000000..df976c7ae73 --- /dev/null +++ b/doc/device-tree-bindings/arm/adi/adi,sc5xx.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0+) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/adi/adi,sc5xx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices SC5XX ARM-based SoCs + +maintainers: + - Vasileios Bimpikas <[email protected]> + - Utsav Agarwal <[email protected]> + - Arturs Artamonovs <[email protected]> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: SC57X Series Boards + items: + - const: adi,sc573-ezkit + - const: adi,sc57x + + - description: SC58X Series Boards + items: + - enum: + - adi,sc584-ezkit + - adi,sc589-ezkit + - adi,sc589-mini + - const: adi,sc58x + + - description: SC59X Series 32-bit Boards + items: + - enum: + - adi,sc594-som-ezkit + - adi,sc594-som-ezlite + - const: adi,sc59x + + - description: SC59X Series 64-bit Boards + items: + - enum: + - adi,sc598-som-ezkit + - adi,sc598-som-ezlite + - const: adi,sc59x-64 + +additionalProperties: true diff --git a/doc/device-tree-bindings/clock/adi,sc5xx-clocks.yaml b/doc/device-tree-bindings/clock/adi,sc5xx-clocks.yaml new file mode 100644 index 00000000000..9bbd5467a01 --- /dev/null +++ b/doc/device-tree-bindings/clock/adi,sc5xx-clocks.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0+) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/adi,sc5xx-clocks.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Clock Tree Drivers for Analog Devices SC5XX Processors + +maintainers: + - Vasileios Bimpikas <[email protected]> + - Utsav Agarwal <[email protected]> + - Arturs Artamonovs <[email protected]> + +description: | + These drivers read in the processors CDU (clock distribution unit) + and CGU (clock generation unit) values to determine various clock + rates + +properties: + compatible: + enum: + - adi,sc5xx-clocks # Any + - adi,sc57x-clocks # 32-Bit SC573 processor + - adi,sc58x-clocks # 32-Bit SC584, SC589 processors + - adi,sc594-clocks # 32-Bit SC594 processor + - adi,sc598-clocks # 64-Bit SC598 processor + + '#clock-cells': + const: 1 + + reg: + minItems: 3 + maxItems: 4 + + reg-names: + description: + String reference names for the reg property + minItems: 3 + maxItems: 4 + + clocks: + description: + Specifies the CLKIN0 and CLKIN1 reference clock(s) from which the + output frequencies are derived via CDU+CGU + minItems: 2 + maxItems: 2 + + clock-names: + description: + String reference names for CLKIN0 and CLKIN1 + minItems: 2 + maxItems: 2 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + - clock-names + +additionalProperties: false + +examples: + - | + clk0: clocks@3108d000 { + compatible = "adi,sc57x-clocks"; + reg = <0x3108d000 0x1000>, + <0x3108e000 0x1000>, + <0x3108f000 0x1000>; + #clock-cells = <1>; + clocks = <&sys_clkin0>, <&sys_clkin1>; + clock-names = "sys_clkin0", "sys_clkin1"; + status = "okay"; + }; + + - | + clk1: clocks@3108d000 { + compatible = "adi,sc58x-clocks"; + reg = <0x3108d000 0x1000>, + <0x3108e000 0x1000>, + <0x3108f000 0x1000>; + #clock-cells = <1>; + clocks = <&sys_clkin0>, <&sys_clkin1>; + clock-names = "sys_clkin0", "sys_clkin1"; + status = "okay"; + }; + + - | + clk2: clocks@3108d000 { + compatible = "adi,sc594-clocks"; + reg = <0x3108d000 0x1000>, + <0x3108e000 0x1000>, + <0x3108f000 0x1000>; + #clock-cells = <1>; + clocks = <&sys_clkin0>, <&sys_clkin1>; + clock-names = "sys_clkin0", "sys_clkin1"; + status = "okay"; + }; + + - | + clk3: clocks@3108d000 { + compatible = "adi,sc598-clocks"; + reg = <0x3108d000 0x1000>, + <0x3108e000 0x1000>, + <0x3108f000 0x1000>, + <0x310a9000 0x1000>; + #clock-cells = <1>; + clocks = <&sys_clkin0>, <&sys_clkin1>; + clock-names = "sys_clkin0", "sys_clkin1"; + status = "okay"; + }; + diff --git a/doc/device-tree-bindings/timer/adi,sc5xx-gptimer.yaml b/doc/device-tree-bindings/timer/adi,sc5xx-gptimer.yaml new file mode 100644 index 00000000000..5e313af6fe0 --- /dev/null +++ b/doc/device-tree-bindings/timer/adi,sc5xx-gptimer.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0+) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/adi,sc5xx-gptimer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices SC5XX Series SoC Timer Peripherals + +maintainers: + - Vasileios Bimpikas <[email protected]> + - Utsav Agarwal <[email protected]> + - Arturs Artamonovs <[email protected]> + +properties: + compatible: + const: adi,sc5xx-gptimer + + reg: + minItems: 2 + maxItems: 2 + + clocks: + minItems: 1 + maxItems: 1 + +required: + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + timer0: timer@31018000 { + compatible = "adi,sc5xx-gptimer"; + reg = <0x31018004 0x100>, + <0x31018060 0x100>; + status = "okay"; + bootph-all; + }; + diff --git a/include/configs/sc573-ezkit.h b/include/configs/sc573-ezkit.h new file mode 100644 index 00000000000..42e42f8150b --- /dev/null +++ b/include/configs/sc573-ezkit.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#ifndef __CONFIG_SC573_EZKIT_H +#define __CONFIG_SC573_EZKIT_H + +/* + * Memory Settings + */ +#define MEM_MT41K128M16JT +#define MEM_DMC0 + +#define CFG_SYS_SDRAM_BASE 0x82000000 +#define CFG_SYS_SDRAM_SIZE 0xe000000 + +#endif diff --git a/include/configs/sc584-ezkit.h b/include/configs/sc584-ezkit.h new file mode 100644 index 00000000000..905836cc2cf --- /dev/null +++ b/include/configs/sc584-ezkit.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#ifndef __CONFIG_SC584_EZKIT_H +#define __CONFIG_SC584_EZKIT_H + +/* + * Memory Settings + */ +#define MEM_MT47H128M16RT +#define MEM_DMC0 + +#define CFG_SYS_SDRAM_BASE 0x89000000 +#define CFG_SYS_SDRAM_SIZE 0x7000000 + +#endif diff --git a/include/configs/sc589.h b/include/configs/sc589.h new file mode 100644 index 00000000000..137c80be8e5 --- /dev/null +++ b/include/configs/sc589.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#ifndef __CONFIG_SC589_H +#define __CONFIG_SC589_H + +/* + * Memory Settings + */ +#define MEM_MT41K128M16JT +#define MEM_DMC0 +#define MEM_DMC1 + +#define CFG_SYS_SDRAM_BASE 0xC2000000 +#define CFG_SYS_SDRAM_SIZE 0xe000000 + +#endif diff --git a/include/configs/sc594-som.h b/include/configs/sc594-som.h new file mode 100644 index 00000000000..ba9b0cdb0c0 --- /dev/null +++ b/include/configs/sc594-som.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#ifndef __CONFIG_SC594_SOM_H +#define __CONFIG_SC594_SOM_H + +/* + * Memory Settings + */ +#define MEM_IS43TR16512BL +#define MEM_ISSI_8Gb_DDR3_800MHZ +#define MEM_DMC0 + +#define CFG_SYS_SDRAM_BASE 0xA0000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 + +#endif diff --git a/include/configs/sc598-som.h b/include/configs/sc598-som.h new file mode 100644 index 00000000000..964c694bbe7 --- /dev/null +++ b/include/configs/sc598-som.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2024 - Analog Devices, Inc. + */ + +#ifndef __CONFIG_SC598_SOM_H +#define __CONFIG_SC598_SOM_H + +/* + * Memory Settings + */ +#define MEM_IS43TR16512BL +#define MEM_ISSI_4Gb_DDR3_800MHZ +#define MEM_DMC0 + +#define CFG_SYS_SDRAM_BASE 0x90000000 +#define CFG_SYS_SDRAM_SIZE 0x0e000000 + +/* GIC */ +#define GICD_BASE 0x31200000 +#define GICR_BASE 0x31240000 + +#endif |