diff options
| author | Anton Staaf <[email protected]> | 2011-10-17 16:46:06 -0700 |
|---|---|---|
| committer | Wolfgang Denk <[email protected]> | 2011-10-23 20:50:42 +0200 |
| commit | 0991701a27e7f1de983ff2250dbdb88a7c8c60ec (patch) | |
| tree | 5f8c01502bc1e73e248f2393ca29cbec83429324 | |
| parent | 6fa6035ff2ac62258736ee9365c4b3135a68f4c3 (diff) | |
powerpc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
Signed-off-by: Anton Staaf <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Cc: Mike Frysinger <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Stefan Roese <[email protected]>
| -rw-r--r-- | arch/powerpc/include/asm/cache.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index 53e8d05f50b..e6b8f69b765 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h @@ -21,6 +21,12 @@ #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) /* + * Use the L1 data cache line size value for the minimum DMA buffer alignment + * on PowerPC. + */ +#define ARCH_DMA_MINALIGN L1_CACHE_BYTES + +/* * For compatibility reasons support the CONFIG_SYS_CACHELINE_SIZE too */ #ifndef CONFIG_SYS_CACHELINE_SIZE |