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authorGokul <[email protected]>2026-07-27 16:01:22 +0530
committerTom Rini <[email protected]>2026-08-10 14:22:09 -0600
commit0ed1a87ad81f706c341f41af918219cf8619b6e0 (patch)
tree451a2e97d9883f3e0e406cb571602909c782022c
parent780808133b756261c1c1a0aacb4c7067fc97857b (diff)
arm: mach-k3: j784s4: Add clk and power support for main_uart2 and main_uart3
Enable main_uart2 and main_uart3 for console log functionality. Add clk and device data for main_uart2 and main_uart3 which can be used by main_uart driver to configure clocks and PSC. Signed-off-by: Gokul <[email protected]> Reviewed-by: Neha Malcom Francis <[email protected]>
-rw-r--r--arch/arm/mach-k3/r5/j784s4/clk-data.c6
-rw-r--r--arch/arm/mach-k3/r5/j784s4/dev-data.c33
2 files changed, 24 insertions, 15 deletions
diff --git a/arch/arm/mach-k3/r5/j784s4/clk-data.c b/arch/arm/mach-k3/r5/j784s4/clk-data.c
index 228b424d3f2..7deae563841 100644
--- a/arch/arm/mach-k3/r5/j784s4/clk-data.c
+++ b/arch/arm/mach-k3/r5/j784s4/clk-data.c
@@ -414,6 +414,8 @@ static const struct clk_data clk_list[] = {
CLK_MUX("pcien_cpts_rclk_mux_out1", pcien_cpts_rclk_mux_out1_parents, 16, 0x108084, 0, 4, 0),
CLK_MUX("serdes0_core_refclk_out0", serdes0_core_refclk_out0_parents, 4, 0x108400, 0, 2, 0),
CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c0, 0, 2, 0, 0, 48000000),
+ CLK_DIV("usart_programmable_clock_divider_out2", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c8, 0, 2, 0, 0),
+ CLK_DIV("usart_programmable_clock_divider_out3", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081cc, 0, 2, 0, 0),
CLK_DIV("usart_programmable_clock_divider_out5", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081d4, 0, 2, 0, 0),
CLK_DIV("usart_programmable_clock_divider_out8", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081e0, 0, 2, 0, 0),
CLK_DIV("k3_pll_ctrl_wrap_main_0_chip_div24_clk_clk", "k3_pll_ctrl_wrap_main_0_sysclkout_clk", 0x41011c, 0, 5, 0, 0),
@@ -604,6 +606,10 @@ static const struct dev_clk soc_dev_clk_data[] = {
DEV_CLK(333, 41, "wiz16b8m4ct3_main_0_ip2_ln3_txfclk"),
DEV_CLK(333, 42, "wiz16b8m4ct3_main_0_ip2_ln3_txmclk"),
DEV_CLK(333, 43, "j7am_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk"),
+ DEV_CLK(389, 0, "usart_programmable_clock_divider_out2"),
+ DEV_CLK(389, 3, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
+ DEV_CLK(390, 0, "usart_programmable_clock_divider_out3"),
+ DEV_CLK(390, 3, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(392, 0, "usart_programmable_clock_divider_out5"),
DEV_CLK(392, 3, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(395, 0, "usart_programmable_clock_divider_out8"),
diff --git a/arch/arm/mach-k3/r5/j784s4/dev-data.c b/arch/arm/mach-k3/r5/j784s4/dev-data.c
index 2bb1a88ab3b..2281da6a81f 100644
--- a/arch/arm/mach-k3/r5/j784s4/dev-data.c
+++ b/arch/arm/mach-k3/r5/j784s4/dev-data.c
@@ -47,13 +47,14 @@ static struct ti_lpsc soc_lpsc_list[] = {
[15] = PSC_LPSC(25, &soc_psc_list[2], &soc_pd_list[2], &soc_lpsc_list[5]),
[16] = PSC_LPSC(29, &soc_psc_list[2], &soc_pd_list[2], &soc_lpsc_list[5]),
[17] = PSC_LPSC(43, &soc_psc_list[2], &soc_pd_list[3], NULL),
- [18] = PSC_LPSC(45, &soc_psc_list[2], &soc_pd_list[3], NULL),
- [19] = PSC_LPSC(64, &soc_psc_list[2], &soc_pd_list[4], NULL),
- [20] = PSC_LPSC(78, &soc_psc_list[2], &soc_pd_list[5], NULL),
- [21] = PSC_LPSC(80, &soc_psc_list[2], &soc_pd_list[6], &soc_lpsc_list[20]),
- [22] = PSC_LPSC(81, &soc_psc_list[2], &soc_pd_list[7], &soc_lpsc_list[20]),
- [23] = PSC_LPSC(120, &soc_psc_list[2], &soc_pd_list[8], &soc_lpsc_list[24]),
- [24] = PSC_LPSC(121, &soc_psc_list[2], &soc_pd_list[8], NULL),
+ [18] = PSC_LPSC(44, &soc_psc_list[2], &soc_pd_list[3], NULL),
+ [19] = PSC_LPSC(45, &soc_psc_list[2], &soc_pd_list[3], NULL),
+ [20] = PSC_LPSC(64, &soc_psc_list[2], &soc_pd_list[4], NULL),
+ [21] = PSC_LPSC(78, &soc_psc_list[2], &soc_pd_list[5], NULL),
+ [22] = PSC_LPSC(80, &soc_psc_list[2], &soc_pd_list[6], &soc_lpsc_list[21]),
+ [23] = PSC_LPSC(81, &soc_psc_list[2], &soc_pd_list[7], &soc_lpsc_list[21]),
+ [24] = PSC_LPSC(120, &soc_psc_list[2], &soc_pd_list[8], &soc_lpsc_list[25]),
+ [25] = PSC_LPSC(121, &soc_psc_list[2], &soc_pd_list[8], NULL),
};
static struct ti_dev soc_dev_list[] = {
@@ -83,14 +84,16 @@ static struct ti_dev soc_dev_list[] = {
PSC_DEV(140, &soc_lpsc_list[15]),
PSC_DEV(333, &soc_lpsc_list[16]),
PSC_DEV(146, &soc_lpsc_list[17]),
- PSC_DEV(392, &soc_lpsc_list[18]),
- PSC_DEV(395, &soc_lpsc_list[18]),
- PSC_DEV(404, &soc_lpsc_list[19]),
- PSC_DEV(198, &soc_lpsc_list[20]),
- PSC_DEV(202, &soc_lpsc_list[21]),
- PSC_DEV(203, &soc_lpsc_list[22]),
- PSC_DEV(133, &soc_lpsc_list[23]),
- PSC_DEV(193, &soc_lpsc_list[24]),
+ PSC_DEV(389, &soc_lpsc_list[18]),
+ PSC_DEV(390, &soc_lpsc_list[18]),
+ PSC_DEV(392, &soc_lpsc_list[19]),
+ PSC_DEV(395, &soc_lpsc_list[19]),
+ PSC_DEV(404, &soc_lpsc_list[20]),
+ PSC_DEV(198, &soc_lpsc_list[21]),
+ PSC_DEV(202, &soc_lpsc_list[22]),
+ PSC_DEV(203, &soc_lpsc_list[23]),
+ PSC_DEV(133, &soc_lpsc_list[24]),
+ PSC_DEV(193, &soc_lpsc_list[25]),
};
const struct ti_k3_pd_platdata j784s4_pd_platdata = {