diff options
| author | Yinbo Zhu <[email protected]> | 2019-05-14 17:34:57 +0800 |
|---|---|---|
| committer | Prabhakar Kushwaha <[email protected]> | 2019-06-19 12:54:56 +0530 |
| commit | 123fbbbe84e06f3ff0a8e263275a55ad1e83e380 (patch) | |
| tree | f1268ce27d27da315d713841671150880336648d | |
| parent | 3458a4198cca572f6c82d38810e4f3c80dc8849d (diff) | |
armv8: ls1028a: enable workaround for USB errarum A-009007
Rx Compliance tests may fail intermittently at high jitter
frequencies using default register values.
So program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.
Signed-off-by: Yinbo Zhu <[email protected]>
Signed-off-by: Ran Wang <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/soc.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index f2392f0ebf5..af2d86bb9dd 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -143,7 +143,8 @@ static void erratum_a008997(void) out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_3); \ out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_4) -#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) +#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) || \ + defined(CONFIG_ARCH_LS1028A) #define PROGRAM_USB_PHY_RX_OVRD_IN_HI(phy) \ out_le16((phy) + DCSR_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1); \ @@ -167,7 +168,8 @@ static void erratum_a009007(void) usb_phy = (void __iomem *)SCFG_USB_PHY3; PROGRAM_USB_PHY_RX_OVRD_IN_HI(usb_phy); #endif -#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) +#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) || \ + defined(CONFIG_ARCH_LS1028A) void __iomem *dcsr = (void __iomem *)DCSR_BASE; PROGRAM_USB_PHY_RX_OVRD_IN_HI(dcsr + DCSR_USB_PHY1); |