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authorBin Meng <[email protected]>2023-04-03 11:37:32 +0800
committerLeo Yu-Chi Liang <[email protected]>2023-04-20 20:45:08 +0800
commit16f53be076512e888a572297df10484df7a32849 (patch)
tree07468be1929563e10feec1b96c17800d339d20ba
parent0eff3bf17631889945c89918ea3b97f7c626aef0 (diff)
riscv: Correct a comment in io.h
Replace NDS32 with RISC-V in the comments. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Rick Chen <[email protected]>
-rw-r--r--arch/riscv/include/asm/io.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
index 220266e76f8..b16e6dfa376 100644
--- a/arch/riscv/include/asm/io.h
+++ b/arch/riscv/include/asm/io.h
@@ -180,7 +180,7 @@ static inline u64 readq(const volatile void __iomem *addr)
* IO port access primitives
* -------------------------
*
- * The NDS32 doesn't have special IO access instructions just like ARM;
+ * The RISC-V doesn't have special IO access instructions just like ARM;
* all IO is memory mapped.
* Note that these are defined to perform little endian accesses
* only. Their primary purpose is to access PCI and ISA peripherals.