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authorPeng Fan <[email protected]>2024-10-12 17:34:10 +0800
committerFabio Estevam <[email protected]>2024-10-13 09:46:05 -0300
commit19c0e50a6951b22cfe175986cc54bbbd2e85f30b (patch)
treea51dd2e982b036428e4c134ec827476ab79c5f51
parentb970b73e1e470bb2bb1e50e4cf314b79eba4842c (diff)
clk: imx8mp: Add i.MX8MP Dummy clk
i.MX8MP SDHC use CLK_IMX8MP_DUMMY clk entry. Without the clk, the bulk api will return failure. The correct entry should be replaced with IMX8MP_IPG_ROOT clk in device tree. This will be done in Kernel device tree and sync to U-Boot in future: https://lore.kernel.org/all/[email protected]/ Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API") Reported-by: Gilles Talis <[email protected]> Tested-by: Gilles TALIS <[email protected]> Signed-off-by: Peng Fan <[email protected]>
-rw-r--r--drivers/clk/imx/clk-imx8mp.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 34d91cd6880..1d04090ca00 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -197,6 +197,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
base = (void *)ANATOP_BASE_ADDR;
+ clk_dm(IMX8MP_CLK_DUMMY, clk_register_fixed_rate(NULL, "dummy", 0));
+
clk_dm(IMX8MP_DRAM_PLL_REF_SEL, imx_clk_mux("dram_pll_ref_sel", base + 0x50, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)));
clk_dm(IMX8MP_ARM_PLL_REF_SEL, imx_clk_mux("arm_pll_ref_sel", base + 0x84, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)));
clk_dm(IMX8MP_SYS_PLL1_REF_SEL, imx_clk_mux("sys_pll1_ref_sel", base + 0x94, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)));