diff options
| author | Tang Yuantian <[email protected]> | 2015-12-16 13:50:57 +0800 |
|---|---|---|
| committer | York Sun <[email protected]> | 2016-01-25 08:24:15 -0800 |
| commit | 1ef7ac70e24c40553307d5246cfa6ebd7394f2f1 (patch) | |
| tree | 9558a2a5bcca5b4788a34cf3edacb3d80e2177e7 | |
| parent | a994b3deb00bf3177cdf9f92060baec4f640f466 (diff) | |
arm: ls1021a: Adjust sata register default values
Updated the default sata register values to enhance the
performance and stability.
Signed-off-by: Tang Yuantian <[email protected]>
Reviewed-by: York Sun <[email protected]>
| -rw-r--r-- | arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c index deeb674c692..144f2c368d0 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c @@ -11,11 +11,11 @@ /* port register default value */ #define AHCI_PORT_PHY_1_CFG 0xa003fffe -#define AHCI_PORT_PHY_2_CFG 0x28183411 -#define AHCI_PORT_PHY_3_CFG 0x0e081004 -#define AHCI_PORT_PHY_4_CFG 0x00480811 -#define AHCI_PORT_PHY_5_CFG 0x192c96a4 -#define AHCI_PORT_TRANS_CFG 0x08000025 +#define AHCI_PORT_PHY_2_CFG 0x28183414 +#define AHCI_PORT_PHY_3_CFG 0x0e080e06 +#define AHCI_PORT_PHY_4_CFG 0x064a080b +#define AHCI_PORT_PHY_5_CFG 0x2aa86470 +#define AHCI_PORT_TRANS_CFG 0x08000029 #define SATA_ECC_REG_ADDR 0x20220520 #define SATA_ECC_DISABLE 0x00020000 |