diff options
| author | Ye Li <[email protected]> | 2017-04-05 10:36:58 +0800 |
|---|---|---|
| committer | Stefano Babic <[email protected]> | 2017-04-12 18:45:10 +0200 |
| commit | 2018ef868c1faf6231b8aeb6d0427f139923a9a6 (patch) | |
| tree | 868a2e939e104611d72c77210d2eec6e4388801e | |
| parent | b69999efd8c6c6a1246234b1d06375d00149fde5 (diff) | |
imx: mx7ulp: Fix SPLL/APLL clock rate calculation issue
The num/denom is a float value, but in the calculation it is convert
to integer 0, and wrong result.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
| -rw-r--r-- | arch/arm/cpu/armv7/mx7ulp/scg.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx7ulp/scg.c b/arch/arm/cpu/armv7/mx7ulp/scg.c index ca8252d0d27..c117af0a0ec 100644 --- a/arch/arm/cpu/armv7/mx7ulp/scg.c +++ b/arch/arm/cpu/armv7/mx7ulp/scg.c @@ -504,7 +504,9 @@ u32 decode_pll(enum pll_clocks pll) num = readl(&scg1_regs->spllnum); denom = readl(&scg1_regs->splldenom); - return (infreq / pre_div) * (mult + num / denom); + infreq = infreq / pre_div; + + return infreq * mult + infreq * num / denom; case PLL_A7_APLL: reg = readl(&scg1_regs->apllcsr); @@ -531,7 +533,9 @@ u32 decode_pll(enum pll_clocks pll) num = readl(&scg1_regs->apllnum); denom = readl(&scg1_regs->aplldenom); - return (infreq / pre_div) * (mult + num / denom); + infreq = infreq / pre_div; + + return infreq * mult + infreq * num / denom; case PLL_USB: reg = readl(&scg1_regs->upllcsr); |