diff options
| author | Quentin Schulz <[email protected]> | 2022-11-14 11:33:46 +0100 |
|---|---|---|
| committer | Kever Yang <[email protected]> | 2023-01-16 18:01:10 +0800 |
| commit | 23b71addf90d2df7df591a84ed69300334b26ca9 (patch) | |
| tree | eeba4e2a173aa09ab03548885d535f169fa86077 | |
| parent | 4b564460023a8cbf58d56f354e8ab45264770825 (diff) | |
rockchip: clk: add watchdog clock to px30_clk_enable
Add the PCLK_WDT_NS clock to px30_clk_enable so that the watchdog driver
can probe since it wants to enable this clock.
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
| -rw-r--r-- | drivers/clk/rockchip/clk_px30.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c index 5d467447a17..33a7348b9fc 100644 --- a/drivers/clk/rockchip/clk_px30.c +++ b/drivers/clk/rockchip/clk_px30.c @@ -1415,6 +1415,9 @@ static int px30_clk_enable(struct clk *clk) case SCLK_GMAC_RMII: /* Required to successfully probe the Designware GMAC driver */ return 0; + case PCLK_WDT_NS: + /* Required to successfully probe the Designware watchdog driver */ + return 0; } debug("%s: unsupported clk %ld\n", __func__, clk->id); |
