diff options
| author | Julien Stephan <[email protected]> | 2026-07-15 16:28:30 +0200 |
|---|---|---|
| committer | David Lechner <[email protected]> | 2026-07-29 09:22:46 -0500 |
| commit | 2460955d031de3052bf88acee50fef64ecc1ef5c (patch) | |
| tree | 44578d3fea1f125bf3d6adbec541495ec59cb8bd | |
| parent | 4e3d9844f177bc4e32e60724f87ee5b48a6bd131 (diff) | |
clk: mediatek: mt8188: use driver data to store the clock tree
Pass each controller's struct mtk_clk_tree through the driver data and use
a single shared probe function for all the MT8188 clock drivers, instead of
a dedicated probe per controller.
The apmixedsys and topckgen controllers keep their own U_BOOT_DRIVER since
they rely on dedicated ops and on the parent bind() callback, but they now
share the generic probe and get their tree from the compatible data, just
like the clock gate controllers.
No functional change intended.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/20260715-b4-mtk-clk-cleanup-clock-gate-drivers-v2-2-23e907516010@baylibre.com
Signed-off-by: David Lechner <[email protected]>
| -rw-r--r-- | drivers/clk/mediatek/clk-mt8188.c | 24 |
1 files changed, 10 insertions, 14 deletions
diff --git a/drivers/clk/mediatek/clk-mt8188.c b/drivers/clk/mediatek/clk-mt8188.c index 3c14d65487c..7f0402a87b6 100644 --- a/drivers/clk/mediatek/clk-mt8188.c +++ b/drivers/clk/mediatek/clk-mt8188.c @@ -1722,16 +1722,6 @@ const struct mtk_clk_tree mt8188_imp_iic_wrap_en_clk_tree = { .num_gates = ARRAY_SIZE(imp_iic_wrap_en_clks), }; -static int mt8188_apmixedsys_probe(struct udevice *dev) -{ - return mtk_common_clk_init(dev, &mt8188_apmixedsys_clk_tree); -} - -static int mt8188_topckgen_probe(struct udevice *dev) -{ - return mtk_common_clk_init(dev, &mt8188_topckgen_clk_tree); -} - static int mt8188_clk_probe(struct udevice *dev) { const struct mtk_clk_tree *tree = (void *)dev_get_driver_data(dev); @@ -1740,12 +1730,18 @@ static int mt8188_clk_probe(struct udevice *dev) } static const struct udevice_id mt8188_apmixed_compat[] = { - { .compatible = "mediatek,mt8188-apmixedsys", }, + { + .compatible = "mediatek,mt8188-apmixedsys", + .data = (ulong)&mt8188_apmixedsys_clk_tree, + }, { } }; static const struct udevice_id mt8188_topckgen_compat[] = { - { .compatible = "mediatek,mt8188-topckgen", }, + { + .compatible = "mediatek,mt8188-topckgen", + .data = (ulong)&mt8188_topckgen_clk_tree, + }, { } }; @@ -1779,7 +1775,7 @@ U_BOOT_DRIVER(mt8188_clk_apmixedsys) = { .id = UCLASS_CLK, .of_match = mt8188_apmixed_compat, .bind = mtk_common_clk_parent_bind, - .probe = mt8188_apmixedsys_probe, + .probe = mt8188_clk_probe, .priv_auto = sizeof(struct mtk_clk_priv), .ops = &mtk_clk_apmixedsys_ops, .flags = DM_FLAG_PRE_RELOC, @@ -1790,7 +1786,7 @@ U_BOOT_DRIVER(mt8188_clk_topckgen) = { .id = UCLASS_CLK, .of_match = mt8188_topckgen_compat, .bind = mtk_common_clk_parent_bind, - .probe = mt8188_topckgen_probe, + .probe = mt8188_clk_probe, .priv_auto = sizeof(struct mtk_clk_priv), .ops = &mtk_clk_topckgen_ops, .flags = DM_FLAG_PRE_RELOC, |