diff options
| author | Mikhail Kshevetskiy <[email protected]> | 2025-11-09 10:06:56 +0300 |
|---|---|---|
| committer | Michael Trimarchi <[email protected]> | 2025-11-18 20:07:41 +0100 |
| commit | 269a4d65566a1f3f593f979d5d784c1a7fce4b19 (patch) | |
| tree | 73f9512a15835efd50b403d4b300868abbfe14ff | |
| parent | a0f6931c32a3baae9affed76320812ad4fd9e867 (diff) | |
spi: airoha: set custom sector size equal to flash page size
Set custom sector size equal to flash page size including oob. Thus we
will always read a single sector. The maximum custom sector size is
8187, so all possible flash sector sizes are supported.
This patch is a necessary step to avoid usage of flash specific
parameters.
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
| -rw-r--r-- | drivers/spi/airoha_snfi_spi.c | 35 |
1 files changed, 19 insertions, 16 deletions
diff --git a/drivers/spi/airoha_snfi_spi.c b/drivers/spi/airoha_snfi_spi.c index 55194648d9c..f1f1a5b9d8d 100644 --- a/drivers/spi/airoha_snfi_spi.c +++ b/drivers/spi/airoha_snfi_spi.c @@ -515,7 +515,7 @@ static int airoha_snand_nfi_config(struct airoha_snand_priv *priv) return err; /* sec num */ - val = FIELD_PREP(SPI_NFI_SEC_NUM, priv->nfi_cfg.sec_num); + val = FIELD_PREP(SPI_NFI_SEC_NUM, 1); err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_CON, SPI_NFI_SEC_NUM, val); if (err) @@ -528,7 +528,8 @@ static int airoha_snand_nfi_config(struct airoha_snand_priv *priv) return err; /* set cust sec size */ - val = FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, priv->nfi_cfg.sec_size); + val = FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, + priv->nfi_cfg.sec_size * priv->nfi_cfg.sec_num); return regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_SECCUS_SIZE, SPI_NFI_CUS_SEC_SIZE, val); @@ -614,8 +615,11 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc, u8 *txrx_buf = priv->txrx_buf; dma_addr_t dma_addr; u32 val, rd_mode, opcode; + size_t bytes; int err; + bytes = priv->nfi_cfg.sec_num * priv->nfi_cfg.sec_size; + /* * DUALIO and QUADIO opcodes are not supported by the spi controller, * replace them with supported opcodes. @@ -674,18 +678,17 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc, goto error_dma_mode_off; /* Set number of sector will be read */ - val = FIELD_PREP(SPI_NFI_SEC_NUM, priv->nfi_cfg.sec_num); err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_CON, - SPI_NFI_SEC_NUM, val); + SPI_NFI_SEC_NUM, + FIELD_PREP(SPI_NFI_SEC_NUM, 1)); if (err) goto error_dma_mode_off; /* Set custom sector size */ - val = priv->nfi_cfg.sec_size; err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_SECCUS_SIZE, SPI_NFI_CUS_SEC_SIZE | SPI_NFI_CUS_SEC_SIZE_EN, - FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, val) | + FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, bytes) | SPI_NFI_CUS_SEC_SIZE_EN); if (err) goto error_dma_mode_off; @@ -707,11 +710,10 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc, * = NFI_SNF_MISC_CTL2.read_data_byte_number = * = NFI_CON.sector_number * NFI_SECCUS.custom_sector_size */ - val = priv->nfi_cfg.sec_size * priv->nfi_cfg.sec_num; - val = FIELD_PREP(SPI_NFI_READ_DATA_BYTE_NUM, val); err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_SNF_MISC_CTL2, - SPI_NFI_READ_DATA_BYTE_NUM, val); + SPI_NFI_READ_DATA_BYTE_NUM, + FIELD_PREP(SPI_NFI_READ_DATA_BYTE_NUM, bytes)); if (err) goto error_dma_unmap; @@ -800,8 +802,11 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc, u8 *txrx_buf = priv->txrx_buf; dma_addr_t dma_addr; u32 wr_mode, val, opcode; + size_t bytes; int err; + bytes = priv->nfi_cfg.sec_num * priv->nfi_cfg.sec_size; + opcode = desc->info.op_tmpl.cmd.opcode; switch (opcode) { case SPI_NAND_OP_PROGRAM_LOAD_SINGLE: @@ -856,18 +861,17 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc, goto error_dma_mode_off; /* Set number of sector will be written */ - val = FIELD_PREP(SPI_NFI_SEC_NUM, priv->nfi_cfg.sec_num); err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_CON, - SPI_NFI_SEC_NUM, val); + SPI_NFI_SEC_NUM, + FIELD_PREP(SPI_NFI_SEC_NUM, 1)); if (err) goto error_dma_mode_off; /* Set custom sector size */ - val = priv->nfi_cfg.sec_size; err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_SECCUS_SIZE, SPI_NFI_CUS_SEC_SIZE | SPI_NFI_CUS_SEC_SIZE_EN, - FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, val) | + FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, bytes) | SPI_NFI_CUS_SEC_SIZE_EN); if (err) goto error_dma_mode_off; @@ -889,11 +893,10 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc, * = NFI_SNF_MISC_CTL2.write_data_byte_number = * = NFI_CON.sector_number * NFI_SECCUS.custom_sector_size */ - val = priv->nfi_cfg.sec_size * priv->nfi_cfg.sec_num; - val = FIELD_PREP(SPI_NFI_PROG_LOAD_BYTE_NUM, val); err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_SNF_MISC_CTL2, - SPI_NFI_PROG_LOAD_BYTE_NUM, val); + SPI_NFI_PROG_LOAD_BYTE_NUM, + FIELD_PREP(SPI_NFI_PROG_LOAD_BYTE_NUM, bytes)); if (err) goto error_dma_unmap; |
