diff options
| author | Anshul Dalal <[email protected]> | 2025-05-22 18:03:04 +0530 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-06-04 12:27:57 -0600 |
| commit | 27cd65ca1bf16c21818c233c6d658f3e747f5e85 (patch) | |
| tree | 81aea606da8a03cd31b2bbcba6d5eaa75c299ac7 | |
| parent | 5262b3ab9329b702f98ef61e76b0c78eb8c76f24 (diff) | |
mach-k3: am62ax: enable caches for the SPL stage
board_init_f for the am62a is missing the call to spl_enable_cache which
exists for all other am62 platforms (check am625_init.c &
am62p5_init.c).
This allows the usage of caches while loading and parsing the u-boot.img
FIT resulting in ~2x speedup in the A53 SPL stage.
Signed-off-by: Anshul Dalal <[email protected]>
| -rw-r--r-- | arch/arm/mach-k3/am62ax/am62a7_init.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/am62ax/am62a7_init.c b/arch/arm/mach-k3/am62ax/am62a7_init.c index 28aee34f30b..edd43a1d78d 100644 --- a/arch/arm/mach-k3/am62ax/am62a7_init.c +++ b/arch/arm/mach-k3/am62ax/am62a7_init.c @@ -191,6 +191,7 @@ void board_init_f(ulong dummy) if (ret) panic("DRAM init failed: %d\n", ret); #endif + spl_enable_cache(); setup_qos(); |