diff options
| author | Marek Vasut <[email protected]> | 2022-04-13 00:41:10 +0200 |
|---|---|---|
| committer | Stefano Babic <[email protected]> | 2022-04-13 09:38:25 +0200 |
| commit | 2c6ae0a15fca8130e49b97f834c0bdb25e26b749 (patch) | |
| tree | b81d7dab542e1dd878106fcffcf5b776163641ad | |
| parent | 20bd57e90e8a96e9bd5c5cdcc4b012013101dc8f (diff) | |
clk: imx8mp: Fix 24M and 32k clock
Fix registration of 24M and 32k clock, those got applied or rebased
incorrectly, so fill in the correct code.
Fixes: 7a2c3be95a5 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock")
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Ye Li <[email protected]>
| -rw-r--r-- | drivers/clk/imx/clk-imx8mp.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index aba347bc108..ac727b7e404 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -162,7 +162,9 @@ static const char *imx8mp_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", } static int imx8mp_clk_probe(struct udevice *dev) { + struct clk osc_24m_clk, osc_32k_clk; void __iomem *base; + int ret; base = (void *)ANATOP_BASE_ADDR; @@ -215,7 +217,15 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_SYS_PLL2_500M, imx_clk_fixed_factor("sys_pll2_500m", "sys_pll2_out", 1, 2)); clk_dm(IMX8MP_SYS_PLL2_1000M, imx_clk_fixed_factor("sys_pll2_1000m", "sys_pll2_out", 1, 1)); - clk_dm(IMX8MP_CLK_24M, imx_clk_fixed_factor("clock-osc-24m", "osc_24m", 1, 1)); + ret = clk_get_by_name(dev, "osc_24m", &osc_24m_clk); + if (ret) + return ret; + clk_dm(IMX8MP_CLK_24M, dev_get_clk_ptr(osc_24m_clk.dev)); + + ret = clk_get_by_name(dev, "osc_32k", &osc_32k_clk); + if (ret) + return ret; + clk_dm(IMX8MP_CLK_32K, dev_get_clk_ptr(osc_32k_clk.dev)); base = dev_read_addr_ptr(dev); if (!base) |