diff options
| author | Sean Anderson <[email protected]> | 2020-09-21 07:51:39 -0400 |
|---|---|---|
| committer | Andes <[email protected]> | 2020-09-30 08:54:52 +0800 |
| commit | 309995b315b9ffef999810af212cccb7a50004bc (patch) | |
| tree | 032296314ad07c1732b0a02873604bbb99c5abee | |
| parent | 768502e2a7f283a715dd1f62e304393a88422545 (diff) | |
riscv: Consolidate fences into AMOs for available_harts_lock
We can reduce the number of instructions needed to use available_harts_lock
by using the aq and rl suffixes for AMOs.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
| -rw-r--r-- | arch/riscv/cpu/start.S | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index e3222b1ea7c..66ca1c70204 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -125,14 +125,12 @@ call_board_init_f_0: #ifndef CONFIG_XIP la t0, available_harts_lock - fence rw, w - amoswap.w zero, zero, 0(t0) + amoswap.w.rl zero, zero, 0(t0) wait_for_gd_init: la t0, available_harts_lock li t1, 1 -1: amoswap.w t1, t1, 0(t0) - fence r, rw +1: amoswap.w.aq t1, t1, 0(t0) bnez t1, 1b /* register available harts in the available_harts mask */ @@ -142,8 +140,7 @@ wait_for_gd_init: or t2, t2, t1 SREG t2, GD_AVAILABLE_HARTS(gp) - fence rw, w - amoswap.w zero, zero, 0(t0) + amoswap.w.rl zero, zero, 0(t0) /* * Continue on hart lottery winner, others branch to |