diff options
| author | David Lechner <[email protected]> | 2026-03-16 16:55:14 -0500 |
|---|---|---|
| committer | David Lechner <[email protected]> | 2026-04-07 11:07:44 -0500 |
| commit | 34b43ab5e151399eb14ce53468377c376f34e305 (patch) | |
| tree | 756674c87abb4166c2bf14545b6812a3bc9798c3 | |
| parent | ed53a7b2a6d3f7b5400881246d463fd9faf829a7 (diff) | |
arm: dts: mt8371: add SD card nodes
Add SD card nodes to the MT8371 Genio common and MT8189 SoC device tree
files. This is coming from what has been submitted upstream in Linux
[1]. The process is going slow, so we a copy in U-Boot until we can
switch to CONFIG_OF_UPSTREAM.
Link: https://lore.kernel.org/linux-mediatek/20251203-add-mediatek-genio-520-720-evk-v1-0-df794b2a30ae@collabora.com/ [1]
Reviewed-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
| -rw-r--r-- | arch/arm/dts/mt8189.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/dts/mt8371-genio-common.dtsi | 67 |
2 files changed, 79 insertions, 0 deletions
diff --git a/arch/arm/dts/mt8189.dtsi b/arch/arm/dts/mt8189.dtsi index 3aafb9b151f..d246be63293 100644 --- a/arch/arm/dts/mt8189.dtsi +++ b/arch/arm/dts/mt8189.dtsi @@ -191,6 +191,18 @@ status = "disabled"; }; + mmc1: mmc@11240000 { + compatible = "mediatek,mt8189-mmc"; + reg = <0 0x11240000 0 0x1000>, + <0 0x11d80000 0 0x1000>; + clocks = <&topckgen_clk CLK_TOP_MSDC30_1_SEL>, + <&pericfg_ao_clk CLK_PERAO_MSDC1_H>, + <&pericfg_ao_clk CLK_PERAO_MSDC1>; + clock-names = "source", "hclk", "source_cg"; + interrupts = <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH 0>; + status = "disabled"; + }; + clock-controller@1000c000 { compatible = "mediatek,mt8189-apmixedsys", "syscon"; reg = <0 0x1000c000 0 0x1000>; diff --git a/arch/arm/dts/mt8371-genio-common.dtsi b/arch/arm/dts/mt8371-genio-common.dtsi index c6aa22b7d10..58322193aef 100644 --- a/arch/arm/dts/mt8371-genio-common.dtsi +++ b/arch/arm/dts/mt8371-genio-common.dtsi @@ -4,6 +4,8 @@ * Author: Macpaul Lin <[email protected]> */ +#include <dt-bindings/gpio/gpio.h> + #include "mt8189.dtsi" #include "mt8189-pinfunc.h" #include "mt6359.dtsi" @@ -94,6 +96,23 @@ status = "okay"; }; +&mmc1 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&pio 2 GPIO_ACTIVE_HIGH>; + max-frequency = <200000000>; + no-mmc; + no-sdio; + sd-uhs-sdr50; + sd-uhs-sdr104; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_default_pins>; + pinctrl-1 = <&mmc1_uhs_pins>; + vmmc-supply = <&mt6359_vpa_buck_reg>; + vqmmc-supply = <&mt6359_vsim1_ldo_reg>; + status = "okay"; +}; + &mt6359_vufs_ldo_reg { regulator-always-on; }; @@ -162,6 +181,54 @@ }; }; + mmc1_default_pins: mmc1-default-pins { + pins-clk { + pinmux = <PINMUX_GPIO169__FUNC_MSDC1_CLK>; + drive-strength = <6>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; + }; + + pins-cmd-dat { + pinmux = <PINMUX_GPIO170__FUNC_MSDC1_DAT0>, + <PINMUX_GPIO171__FUNC_MSDC1_DAT1>, + <PINMUX_GPIO172__FUNC_MSDC1_DAT2>, + <PINMUX_GPIO173__FUNC_MSDC1_DAT3>, + <PINMUX_GPIO168__FUNC_MSDC1_CMD>; + input-enable; + drive-strength = <6>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; + }; + + pins-insert { + pinmux = <PINMUX_GPIO2__FUNC_GPIO2>; + bias-pull-up; + }; + }; + + mmc1_uhs_pins: mmc1-uhs-pins { + pins-clk { + pinmux = <PINMUX_GPIO169__FUNC_MSDC1_CLK>; + drive-strength = <8>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; + }; + + pins-cmd-dat { + pinmux = <PINMUX_GPIO170__FUNC_MSDC1_DAT0>, + <PINMUX_GPIO171__FUNC_MSDC1_DAT1>, + <PINMUX_GPIO172__FUNC_MSDC1_DAT2>, + <PINMUX_GPIO173__FUNC_MSDC1_DAT3>, + <PINMUX_GPIO168__FUNC_MSDC1_CMD>; + input-enable; + drive-strength = <8>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; + }; + + pins-insert { + pinmux = <PINMUX_GPIO2__FUNC_GPIO2>; + bias-pull-up; + }; + }; + uart0_pins: uart0-pins { pins { pinmux = <PINMUX_GPIO31__FUNC_UTXD0>, |