diff options
| author | Michal Simek <[email protected]> | 2026-06-29 11:46:36 +0200 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2026-07-08 08:55:52 +0200 |
| commit | 34c89c840c33dd154746ebdc9bbf2e4f3614d292 (patch) | |
| tree | 203a77dffb82a220a95e088004ab0e553a995660 | |
| parent | ad1d2c9d20fc543dbe6ff1621a295f780ed70cff (diff) | |
arm: dts: zynqmp: Fix space indentation to use tabs
Fix indentation issues where spaces were used instead of tabs in several
ZynqMP device tree overlay files. Device tree files should use tabs for
indentation to maintain consistency with the kernel coding style.
Reviewed-by: Tomas Melin <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://patch.msgid.link/0dc7b65ebd48676719ace15a505ecec2f324822a.1782726386.git.michal.simek@amd.com
| -rw-r--r-- | arch/arm/dts/zynqmp-sc-vm-p-m1369-00-revA.dtso | 4 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-sck-kv-g-revA.dtso | 36 |
2 files changed, 20 insertions, 20 deletions
diff --git a/arch/arm/dts/zynqmp-sc-vm-p-m1369-00-revA.dtso b/arch/arm/dts/zynqmp-sc-vm-p-m1369-00-revA.dtso index 8bb4dd6e3e7..58be0e1c890 100644 --- a/arch/arm/dts/zynqmp-sc-vm-p-m1369-00-revA.dtso +++ b/arch/arm/dts/zynqmp-sc-vm-p-m1369-00-revA.dtso @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP VM-P-M1369-00 * - * Copyright (C) 2024, Advanced Micro Devices, Inc. + * Copyright (C) 2024-2026, Advanced Micro Devices, Inc. * * Michal Simek <[email protected]> */ @@ -409,7 +409,7 @@ }; /* connected via J425 connector - ucd90320: power-sequencer@73 { // u16 + ucd90320: power-sequencer@73 { // u16 compatible = "ti,ucd90320"; reg = <0x73>; };*/ diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso index 3c551f30315..967548744d5 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso @@ -246,23 +246,23 @@ status = "okay"; pinctrl_gpio0_default: gpio0-default { - conf { - groups = "gpio0_38_grp"; - bias-pull-up; - power-source = <IO_STANDARD_LVCMOS18>; - }; + conf { + groups = "gpio0_38_grp"; + bias-pull-up; + power-source = <IO_STANDARD_LVCMOS18>; + }; - mux { - groups = "gpio0_38_grp"; - function = "gpio0"; - }; + mux { + groups = "gpio0_38_grp"; + function = "gpio0"; + }; - conf-tx { - pins = "MIO38"; - bias-disable; - output-enable; - }; - }; + conf-tx { + pins = "MIO38"; + bias-disable; + output-enable; + }; + }; pinctrl_uart1_default: uart1-default { conf { @@ -421,9 +421,9 @@ }; &gpio { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio0_default>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio0_default>; }; &uart1 { |