summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMichal Simek <[email protected]>2022-11-16 11:59:19 +0100
committerMichal Simek <[email protected]>2022-11-22 15:02:07 +0100
commit38920451c71844e2da82b4def8111a541997d649 (patch)
tree7d616c6a26fdd541962f8d4fbccbe897f5417663
parent9dc51069f4dfc64f8b86565239c46995aad09dec (diff)
arm64: zynqmp: Describe TI phy as ethernet-phy-id with reset on zcu106
zcu106 also connects ethernet phy reset via tca6416 chip as is done on other evaluation boards. That's why describe this connection to make sure that ethernet phy is reset before it's use. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/21ccd672b799b5858021f6059098a1247c311fae.1668596358.git.michal.simek@amd.com
-rw-r--r--arch/arm/dts/zynqmp-zcu106-revA.dts19
1 files changed, 13 insertions, 6 deletions
diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts
index 3e137676feb..4858b4d1f5e 100644
--- a/arch/arm/dts/zynqmp-zcu106-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
@@ -200,12 +200,19 @@
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gem3_default>;
- phy0: ethernet-phy@c {
- reg = <0xc>;
- ti,rx-internal-delay = <0x8>;
- ti,tx-internal-delay = <0xa>;
- ti,fifo-depth = <0x1>;
- ti,dp83867-rxctrl-strap-quirk;
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy@c {
+ #phy-cells = <1>;
+ reg = <0xc>;
+ compatible = "ethernet-phy-id2000.a231";
+ ti,rx-internal-delay = <0x8>;
+ ti,tx-internal-delay = <0xa>;
+ ti,fifo-depth = <0x1>;
+ ti,dp83867-rxctrl-strap-quirk;
+ reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
+ };
};
};