diff options
| author | Benoît Thébaudeau <[email protected]> | 2012-11-05 10:07:04 +0000 |
|---|---|---|
| committer | Stefano Babic <[email protected]> | 2012-11-19 08:56:27 +0100 |
| commit | 39e8576164c3bef9d6cb9ad4567c09fc6a87b5fd (patch) | |
| tree | cf37dc6d9cc7e2761d61c04d7ba98e1f2af49e38 | |
| parent | fa88ddb75f0abeee123dd1547f4e32ec3155d31f (diff) | |
mx5: Mark lowlevel_init board-specific code
The mx5 lowlevel_init.S contains board-specific code based on the reference
design. Let's keep it since it avoids creating new lowlevel_init files and it
may be used by many boards. But add a config to make it optional in order not to
cause issues on boards not following this part of the reference design.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Matt Sealey <[email protected]>
Acked-by: Stefano Babic <[email protected]>
| -rw-r--r-- | arch/arm/cpu/armv7/mx5/lowlevel_init.S | 2 | ||||
| -rw-r--r-- | doc/README.imx5 | 5 | ||||
| -rw-r--r-- | include/configs/mx51_efikamx.h | 1 | ||||
| -rw-r--r-- | include/configs/mx51evk.h | 1 | ||||
| -rw-r--r-- | include/configs/vision2.h | 1 |
5 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index 29ec95797ba..6d9396a9767 100644 --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -396,7 +396,7 @@ ENTRY(lowlevel_init) mov r10, lr mov r4, #0 /* Fix R4 to 0 */ -#if defined(CONFIG_MX51) +#if defined(CONFIG_SYS_MAIN_PWR_ON) ldr r0, =GPIO1_BASE_ADDR ldr r1, [r0, #0x0] orr r1, r1, #1 << 23 diff --git a/doc/README.imx5 b/doc/README.imx5 index f7eab7d4b2e..e08941e2ae3 100644 --- a/doc/README.imx5 +++ b/doc/README.imx5 @@ -15,3 +15,8 @@ i.MX5x SoCs. mode), which causes the effect of this failure to be much lower (in terms of frequency deviation), avoiding system failure, or at least decreasing the likelihood of system failure. + +1.2 CONFIG_SYS_MAIN_PWR_ON: Trigger MAIN_PWR_ON upon startup. + This option should be enabled for boards having a SYS_ON_OFF_CTL signal + connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the + reference designs. diff --git a/include/configs/mx51_efikamx.h b/include/configs/mx51_efikamx.h index ffe771f2dcb..a056566efcd 100644 --- a/include/configs/mx51_efikamx.h +++ b/include/configs/mx51_efikamx.h @@ -261,5 +261,6 @@ #define CONFIG_SYS_DDR_CLKSEL 0 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35145 +#define CONFIG_SYS_MAIN_PWR_ON #endif diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index e8c6618ea92..4e823553349 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -235,6 +235,7 @@ #define CONFIG_SYS_DDR_CLKSEL 0 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 +#define CONFIG_SYS_MAIN_PWR_ON /*----------------------------------------------------------------------- * FLASH and environment organization diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 848df88e7df..13c570299fe 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -196,6 +196,7 @@ /* 166 MHz DDR RAM */ #define CONFIG_SYS_DDR_CLKSEL 0 #define CONFIG_SYS_CLKTL_CBCDR 0x19239100 +#define CONFIG_SYS_MAIN_PWR_ON #define CONFIG_SYS_NO_FLASH |