diff options
| author | Julien Stephan <[email protected]> | 2026-07-15 16:28:45 +0200 |
|---|---|---|
| committer | David Lechner <[email protected]> | 2026-07-29 10:10:10 -0500 |
| commit | 3e50b3c680a17faac601eec036e82c6e13431285 (patch) | |
| tree | 2b641bc67d22635a43d154e32158b75a33159ee5 | |
| parent | 5c65308b55752b4309ff45ce55f5e667e034d23a (diff) | |
clk: mediatek: mt8183: deduplicate clock gate drivers
Describe the infracfg gates directly in a struct mtk_clk_tree, reference the
tree from the driver data and use the generic mtk_clk_topckgen_ops instead
of the dedicated clock gate ops.
This stops using mtk_common_clk_gate_init() and struct mtk_cg_priv, which
are scheduled for removal.
No functional change intended.
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/20260715-b4-mtk-clk-cleanup-clock-gate-drivers-v2-17-23e907516010@baylibre.com
Signed-off-by: David Lechner <[email protected]>
| -rw-r--r-- | drivers/clk/mediatek/clk-mt8183.c | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/drivers/clk/mediatek/clk-mt8183.c b/drivers/clk/mediatek/clk-mt8183.c index a619dce5ca3..c2c8957c740 100644 --- a/drivers/clk/mediatek/clk-mt8183.c +++ b/drivers/clk/mediatek/clk-mt8183.c @@ -627,10 +627,12 @@ static const struct mtk_clk_tree mt8183_topckgen_clk_tree = { .type = MTK_CLK_TREE_TOPCKGEN, }; -static const struct mtk_clk_tree mt8183_clk_tree = { - .ext_clk_rates = ext_clock_rates, - .num_ext_clks = ARRAY_SIZE(ext_clock_rates), -}; +static int mt8183_clk_probe(struct udevice *dev) +{ + const struct mtk_clk_tree *tree = (void *)dev_get_driver_data(dev); + + return mtk_common_clk_init(dev, tree); +} static const struct mtk_gate_regs infra0_cg_regs = { .set_ofs = 0x80, @@ -802,11 +804,12 @@ static int mt8183_topckgen_probe(struct udevice *dev) return mtk_common_clk_init(dev, &mt8183_topckgen_clk_tree); } -static int mt8183_infracfg_probe(struct udevice *dev) -{ - return mtk_common_clk_gate_init(dev, &mt8183_clk_tree, infra_clks, - ARRAY_SIZE(infra_clks), 0); -} +static const struct mtk_clk_tree mt8183_infracfg_tree = { + .ext_clk_rates = ext_clock_rates, + .num_ext_clks = ARRAY_SIZE(ext_clock_rates), + .gates = infra_clks, + .num_gates = ARRAY_SIZE(infra_clks), +}; static const struct udevice_id mt8183_apmixed_compat[] = { { .compatible = "mediatek,mt8183-apmixedsys", }, @@ -819,7 +822,10 @@ static const struct udevice_id mt8183_topckgen_compat[] = { }; static const struct udevice_id mt8183_infracfg_compat[] = { - { .compatible = "mediatek,mt8183-infracfg", }, + { + .compatible = "mediatek,mt8183-infracfg", + .data = (ulong)&mt8183_infracfg_tree, + }, { } }; @@ -849,8 +855,8 @@ U_BOOT_DRIVER(mt8183_clk_infracfg) = { .name = "mt8183-infracfg", .id = UCLASS_CLK, .of_match = mt8183_infracfg_compat, - .probe = mt8183_infracfg_probe, + .probe = mt8183_clk_probe, .priv_auto = sizeof(struct mtk_clk_priv), - .ops = &mtk_clk_gate_ops, + .ops = &mtk_clk_topckgen_ops, .flags = DM_FLAG_PRE_RELOC, }; |
