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authorTom Rini <[email protected]>2026-01-15 16:19:40 -0600
committerTom Rini <[email protected]>2026-01-20 12:07:24 -0600
commit410d31bae4b863eabd70adb22a0c9976bfe4fee3 (patch)
tree9f4c15de9c8f35beac9cd951dc8079e0257d7358
parent94b81451890f42b422bb13b03e2c1034b9bfb43d (diff)
x86: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+: Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains that we must have ALIGN(x) statements inside of a section to ensure that padding is included and not simply that the linker address counter is incremented. To that end, this patch: - Rewrite the '.rel.dyn' (u-boot.lds) to follow modern practices, and include the 8-byte alignment at the end of the section. - Expands the '.dynamic' section (u-boot-64.lds) to be more readable when adding a second statement to the section. - Aligns the final section before _end (for U-Boot) or _image_binary_end or __bss_end (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final section before the symbol or changing an existing ALIGN(4) statement. - Ensure that we do have alignment by adding an ASSERT so that when not aligned we fail to link (and explain why). Signed-off-by: Tom Rini <[email protected]>
-rw-r--r--arch/x86/cpu/u-boot-64.lds6
-rw-r--r--arch/x86/cpu/u-boot-spl.lds10
-rw-r--r--arch/x86/cpu/u-boot.lds11
3 files changed, 19 insertions, 8 deletions
diff --git a/arch/x86/cpu/u-boot-64.lds b/arch/x86/cpu/u-boot-64.lds
index 00a6d869121..0c353c5d740 100644
--- a/arch/x86/cpu/u-boot-64.lds
+++ b/arch/x86/cpu/u-boot-64.lds
@@ -86,9 +86,11 @@ SECTIONS
__rel_dyn_end = .;
. = ALIGN(4);
- .dynamic : { *(.dynamic) }
+ .dynamic : {
+ *(.dynamic)
+ . = ALIGN(8);
+ }
- . = ALIGN(4);
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
diff --git a/arch/x86/cpu/u-boot-spl.lds b/arch/x86/cpu/u-boot-spl.lds
index 50b4b160855..57cdce6d751 100644
--- a/arch/x86/cpu/u-boot-spl.lds
+++ b/arch/x86/cpu/u-boot-spl.lds
@@ -68,7 +68,7 @@ SECTIONS
__bss_start = .;
*(.bss*)
*(COM*)
- . = ALIGN(4);
+ . = ALIGN(8);
__bss_end = .;
}
__bss_size = __bss_end - __bss_start;
@@ -97,3 +97,11 @@ SECTIONS
#endif
}
+
+ASSERT(_image_binary_end % 8 == 0, \
+ "_image_binary_end must be 8-byte aligned for device tree");
+
+#if !CONFIG_IS_ENABLED(SEPARATE_BSS)
+ASSERT(__bss_end % 8 == 0, \
+ "__bss_end must be 8-byte aligned for device tree");
+#endif
diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds
index c418ff44aa0..ea070acd6a1 100644
--- a/arch/x86/cpu/u-boot.lds
+++ b/arch/x86/cpu/u-boot.lds
@@ -79,13 +79,12 @@ SECTIONS
. = ALIGN(4);
.dynsym : { *(.dynsym*) }
- . = ALIGN(4);
- __rel_dyn_start = .;
- .rel.dyn : {
+ .rel.dyn ALIGN(4) : {
+ __rel_dyn_start = .;
*(.rel*)
+ __rel_dyn_end = .;
+ . = ALIGN(8);
}
- __rel_dyn_end = .;
- . = ALIGN(4);
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
@@ -120,3 +119,5 @@ SECTIONS
#endif
}
+
+ASSERT(_end % 8 == 0, "_end must be 8-byte aligned for device tree");