Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next

CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/27673 - Switch to upstream devicetree for TH1520 platform - Remove fdt_high env variable - Support SMP on RISC-V cores with Zalrsc only - Make MPFS Generic - riscv: dts: starfive: prune redundant jh7110-common
author: Tom Rini <[email protected]> 2025-09-20 10:02:00 -0600
committer: Tom Rini <[email protected]> 2025-09-20 10:02:00 -0600
commit: 464800d91b036cfd2df26598d8df2ac72d4569dd (patch)
tree: ee4fb80d4b33c9e75039a2f72fc055eb18a9400c
parent: 31eee7d42b44ad7d0bad320461ba0c14750a61d9 (diff)
parent: 10fdc2735da3a4825a5172056090eaf41e061627 (diff)
43 files changed, 1245 insertions, 1675 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 04eb0e6f23c..265b5320777 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -23,8 +23,8 @@ config TARGET_K230_CANMV
 config TARGET_LICHEERV_NANO
 	bool "Support LicheeRV Nano Board"
 
-config TARGET_MICROCHIP_ICICLE
-	bool "Support Microchip PolarFire-SoC Icicle Board"
+config TARGET_MICROCHIP_GENERIC
+	bool "Support Microchip PolarFire-SoC Boards"
 
 config TARGET_MILKV_DUO
 	bool "Support Milk-v Duo Board"
@@ -108,7 +108,7 @@ source "board/andestech/voyager/Kconfig"
 source "board/aspeed/ibex_ast2700/Kconfig"
 source "board/canaan/k230_canmv/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
-source "board/microchip/mpfs_icicle/Kconfig"
+source "board/microchip/mpfs_generic/Kconfig"
 source "board/openpiton/riscv64/Kconfig"
 source "board/sifive/unleashed/Kconfig"
 source "board/sifive/unmatched/Kconfig"
@@ -343,10 +343,27 @@ endmenu
 
 config RISCV_ISA_A
 	bool "Standard extension for Atomic Instructions"
+	depends on RISCV_ISA_ZAAMO && RISCV_ISA_ZALRSC
 	default y
 	help
 	  Adds "A" to the ISA string passed to the compiler.
 
+config RISCV_ISA_ZAAMO
+	bool "Standard extension for Atomic Memory Operations"
+	default y
+	help
+	  Indicates the platform supports Zaamo extension for atomic memory
+	  operations. Hand-written Assembly routines won't use AMO
+	  instructions if set to n.
+
+config RISCV_ISA_ZALRSC
+	bool "Standard extension for LR/SC instructions"
+	default y
+	help
+	  Indicates the platform supports Zalrsc extension for load-reserved
+	  and store-conditional isntructions. Hand-written assembly routines
+	  won't use LR/SC instructions if set to n.
+
 config RISCV_ISA_ZICBOM
 	bool "Zicbom support"
 	depends on !SYS_DISABLE_DCACHE_OPS
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 6f80f4a7108..fdda6da1df3 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -11,7 +11,12 @@ ifeq ($(CONFIG_ARCH_RV32I),y)
 	ARCH_BASE = rv32im
 	ABI_BASE = ilp32
 endif
-ifeq ($(CONFIG_RISCV_ISA_A),y)
+# GCC starts to recognize "Zaamo" and "Zalrsc" from version 15, which is quite
+# recent. We don't bother checking the exact compiler version, but pass "A"
+# extension for -march as long as one of "Zaamo" or "Zalrsc" is available.
+ifeq ($(findstring y,$(CONFIG_RISCV_ISA_A)	\
+		     $(CONFIG_RISCV_ISA_ZAAMO)	\
+		     $(CONFIG_RISCV_ISA_ZALRSC)),y)
 	ARCH_A = a
 endif
 ifeq ($(CONFIG_RISCV_ISA_F),y)
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 7bafdfd390a..6324ff585d4 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -151,9 +151,16 @@ call_harts_early_init:
 	 */
 	la	t0, hart_lottery
 	li	t1, 1
+#if CONFIG_IS_ENABLED(RISCV_ISA_ZAAMO)
 	amoswap.w s2, t1, 0(t0)
 	bnez	s2, wait_for_gd_init
 #else
+	lr.w	s2, (t0)
+	bnez	s2, wait_for_gd_init
+	sc.w	s2, t1, (t0)
+	bnez	s2, wait_for_gd_init
+#endif
+#else
 	/*
 	 * FIXME: gp is set before it is initialized. If an XIP U-Boot ever
 	 * encounters a pending IPI on boot it is liable to jump to whatever
@@ -177,7 +184,12 @@ call_harts_early_init:
 #if !CONFIG_IS_ENABLED(XIP)
 #ifdef CONFIG_AVAILABLE_HARTS
 	la	t0, available_harts_lock
+#if CONFIG_IS_ENABLED(RISCV_ISA_ZAAMO)
 	amoswap.w.rl zero, zero, 0(t0)
+#else
+	fence	rw, w
+	sw	zero, 0(t0)
+#endif
 #endif
 
 wait_for_gd_init:
@@ -190,7 +202,14 @@ wait_for_gd_init:
 #ifdef CONFIG_AVAILABLE_HARTS
 	la	t0, available_harts_lock
 	li	t1, 1
-1:	amoswap.w.aq t1, t1, 0(t0)
+1:
+#if CONFIG_IS_ENABLED(RISCV_ISA_ZAAMO)
+	amoswap.w.aq t1, t1, 0(t0)
+#else
+	lr.w.aq	t1, 0(t0)
+	bnez	t1, 1b
+	sc.w.rl t1, t1, 0(t0)
+#endif
 	bnez	t1, 1b
 
 	/* register available harts in the available_harts mask */
@@ -200,7 +219,12 @@ wait_for_gd_init:
 	or	t2, t2, t1
 	SREG	t2, GD_AVAILABLE_HARTS(gp)
 
+#if CONFIG_IS_ENABLED(RISCV_ISA_ZAAMO)
 	amoswap.w.rl zero, zero, 0(t0)
+#else
+	fence	rw, w
+	sw	zero, 0(t0)
+#endif
 #endif
 
 	/*
diff --git a/arch/riscv/cpu/th1520/Kconfig b/arch/riscv/cpu/th1520/Kconfig
index c73462c04b8..a02f5f24906 100644
--- a/arch/riscv/cpu/th1520/Kconfig
+++ b/arch/riscv/cpu/th1520/Kconfig
@@ -21,3 +21,4 @@ config THEAD_TH1520
 	imply SPL_CPU
 	imply SPL_OPENSBI
 	imply SPL_LOAD_FIT
+	imply OF_UPSTREAM
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index a637727b76b..9b347fc3b50 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -12,7 +12,6 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
 dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
-dtb-$(CONFIG_TARGET_TH1520_LPI4A) += th1520-lichee-pi-4a.dtb
 dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-mbv32.dtb
 dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-mbv64.dtb
 dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-binman.dtb
diff --git a/arch/riscv/dts/jh7110-common-u-boot.dtsi b/arch/riscv/dts/jh7110-common-u-boot.dtsi
deleted file mode 100644
index 049b0a7ce28..00000000000
--- a/arch/riscv/dts/jh7110-common-u-boot.dtsi
+++ /dev/null
@@ -1,99 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-/*
- * Copyright (C) 2023 StarFive Technology Co., Ltd.
- */
-
-#include "jh7110-u-boot.dtsi"
-/ {
-	aliases {
-		spi0 = &qspi;
-	};
-
-	chosen {
-		bootph-pre-ram;
-	};
-
-	firmware {
-		spi0 = &qspi;
-		bootph-pre-ram;
-	};
-
-	memory@40000000 {
-		bootph-pre-ram;
-	};
-};
-
-&uart0 {
-	bootph-pre-ram;
-	reg-offset = <0>;
-	current-speed = <115200>;
-};
-
-&mmc0 {
-	bootph-pre-ram;
-};
-
-&mmc1 {
-	bootph-pre-ram;
-};
-
-&qspi {
-	bootph-pre-ram;
-
-	flash@0 {
-		bootph-pre-ram;
-		cdns,read-delay = <2>;
-		spi-max-frequency = <100000000>;
-	};
-};
-
-&syscrg {
-	assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_ROOT>,
-			  <&syscrg JH7110_SYSCLK_BUS_ROOT>,
-			  <&syscrg JH7110_SYSCLK_PERH_ROOT>,
-			  <&syscrg JH7110_SYSCLK_QSPI_REF>;
-	assigned-clock-parents = <&pllclk JH7110_PLLCLK_PLL0_OUT>,
-				 <&pllclk JH7110_PLLCLK_PLL2_OUT>,
-				 <&pllclk JH7110_PLLCLK_PLL2_OUT>,
-				 <&syscrg JH7110_SYSCLK_QSPI_REF_SRC>;
-	assigned-clock-rates = <0>, <0>, <0>, <0>;
-};
-
-&sysgpio {
-	bootph-pre-ram;
-};
-
-&mmc0_pins {
-	bootph-pre-ram;
-	rst-pins {
-		bootph-pre-ram;
-	};
-};
-
-&mmc1_pins {
-	bootph-pre-ram;
-	clk-pins {
-		bootph-pre-ram;
-	};
-
-	mmc-pins {
-		bootph-pre-ram;
-	};
-};
-
-&i2c5_pins {
-	bootph-pre-ram;
-	i2c-pins {
-		bootph-pre-ram;
-	};
-};
-
-&i2c5 {
-	bootph-pre-ram;
-	eeprom@50 {
-		bootph-pre-ram;
-		compatible = "atmel,24c04";
-		reg = <0x50>;
-		pagesize = <16>;
-	};
-};
diff --git a/arch/riscv/dts/jh7110-deepcomputing-fml13v01-u-boot.dtsi b/arch/riscv/dts/jh7110-deepcomputing-fml13v01-u-boot.dtsi
deleted file mode 100644
index ab882d07f6f..00000000000
--- a/arch/riscv/dts/jh7110-deepcomputing-fml13v01-u-boot.dtsi
+++ /dev/null
@@ -1,7 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-/*
- * Copyright (C) 2024 StarFive Technology Co., Ltd.
- */
-
-#include "jh7110-common-u-boot.dtsi"
-#include "starfive-visionfive2-binman.dtsi"
diff --git a/arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi b/arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi
deleted file mode 100644
index ab882d07f6f..00000000000
--- a/arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi
+++ /dev/null
@@ -1,7 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-/*
- * Copyright (C) 2024 StarFive Technology Co., Ltd.
- */
-
-#include "jh7110-common-u-boot.dtsi"
-#include "starfive-visionfive2-binman.dtsi"
diff --git a/arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi b/arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi
deleted file mode 100644
index ab882d07f6f..00000000000
--- a/arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi
+++ /dev/null
@@ -1,7 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-/*
- * Copyright (C) 2024 StarFive Technology Co., Ltd.
- */
-
-#include "jh7110-common-u-boot.dtsi"
-#include "starfive-visionfive2-binman.dtsi"
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi
deleted file mode 100644
index ab882d07f6f..00000000000
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi
+++ /dev/null
@@ -1,7 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-/*
- * Copyright (C) 2024 StarFive Technology Co., Ltd.
- */
-
-#include "jh7110-common-u-boot.dtsi"
-#include "starfive-visionfive2-binman.dtsi"
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi
deleted file mode 100644
index 874074174ff..00000000000
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi
+++ /dev/null
@@ -1,7 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-/*
- * Copyright (C) 2023 StarFive Technology Co., Ltd.
- */
-
-#include "jh7110-common-u-boot.dtsi"
-#include "starfive-visionfive2-binman.dtsi"
diff --git a/arch/riscv/dts/jh7110-u-boot.dtsi b/arch/riscv/dts/starfive-visionfive2-u-boot.dtsi
index f8d13277d24..0e5dc3685b2 100644
--- a/arch/riscv/dts/jh7110-u-boot.dtsi
+++ b/arch/riscv/dts/starfive-visionfive2-u-boot.dtsi
@@ -3,36 +3,10 @@
  * Copyright (C) 2022 StarFive Technology Co., Ltd.
  */
 
-#include <dt-bindings/reset/starfive,jh7110-crg.h>
-
-/ {
-	timer {
-		compatible = "riscv,timer";
-		interrupts-extended = <&cpu0_intc 5>,
-				      <&cpu1_intc 5>,
-				      <&cpu2_intc 5>,
-				      <&cpu3_intc 5>,
-				      <&cpu4_intc 5>;
-	};
+// BEGIN "riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
+// From upstream Linux conor/riscv-dt-for-next commit 8181cc2f3f21
 
-	soc {
-		bootph-pre-ram;
-
-		dmc: dmc@15700000 {
-			bootph-pre-ram;
-			compatible = "starfive,jh7110-dmc";
-			reg = <0x0 0x15700000 0x0 0x10000>,
-				<0x0 0x13000000 0x0 0x10000>;
-			resets = <&syscrg JH7110_SYSRST_DDR_AXI>,
-				<&syscrg JH7110_SYSRST_DDR_OSC>,
-				<&syscrg JH7110_SYSRST_DDR_APB>;
-			reset-names = "axi", "osc", "apb";
-			clocks = <&syscrg JH7110_PLLCLK_PLL1_OUT>;
-			clock-names = "pll1_out";
-			clock-frequency = <2133>;
-		};
-	};
-};
+#include <dt-bindings/reset/starfive,jh7110-crg.h>
 
 &clint {
 	bootph-pre-ram;
@@ -58,22 +32,10 @@
 	bootph-pre-ram;
 };
 
-&cpus {
-	bootph-pre-ram;
-};
-
 &osc {
 	bootph-pre-ram;
 };
 
-&gmac0_rgmii_rxin {
-	bootph-pre-ram;
-};
-
-&gmac0_rmii_refin {
-	bootph-pre-ram;
-};
-
 &gmac1_rgmii_rxin {
 	bootph-pre-ram;
 };
@@ -82,23 +44,43 @@
 	bootph-pre-ram;
 };
 
-&aoncrg {
-	bootph-pre-ram;
+/ {
+	soc {
+		memory-controller@15700000 {
+			compatible = "starfive,jh7110-dmc";
+			reg = <0x0 0x15700000 0x0 0x10000>,
+			      <0x0 0x13000000 0x0 0x10000>;
+			bootph-pre-ram;
+			clocks = <&syscrg JH7110_PLLCLK_PLL1_OUT>;
+			clock-names = "pll";
+			resets = <&syscrg JH7110_SYSRST_DDR_AXI>,
+				 <&syscrg JH7110_SYSRST_DDR_OSC>,
+				 <&syscrg JH7110_SYSRST_DDR_APB>;
+			reset-names = "axi", "osc", "apb";
+		};
+	};
 };
 
-&pllclk {
+&syscrg {
 	bootph-pre-ram;
 };
 
-&syscrg {
-	assigned-clock-rates = <0>; /* cpufreq not implemented, use defaults */
+&pllclk {
 	bootph-pre-ram;
 };
 
-&stgcrg {
-	bootph-pre-ram;
+// END "riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
+
+/ {
+	soc {
+		memory-controller@15700000 {
+			clock-frequency = <2133>; /* FIXME: delete property and implement CCF */
+		};
+	};
 };
 
-&sys_syscon {
-	bootph-pre-ram;
+&syscrg {
+	assigned-clock-rates = <0>; /* FIXME: delete property and implement cpufreq */
 };
+
+#include "starfive-visionfive2-binman.dtsi"
diff --git a/arch/riscv/dts/th1520-lichee-module-4a-u-boot.dtsi b/arch/riscv/dts/th1520-lichee-module-4a-u-boot.dtsi
new file mode 100644
index 00000000000..bbfa3c499cf
--- /dev/null
+++ b/arch/riscv/dts/th1520-lichee-module-4a-u-boot.dtsi
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Yao Zi <[email protected]>
+ */
+
+#include "th1520-u-boot.dtsi"
+
+&{/memory@0} {
+	bootph-pre-ram;
+};
diff --git a/arch/riscv/dts/th1520-lichee-module-4a.dtsi b/arch/riscv/dts/th1520-lichee-module-4a.dtsi
deleted file mode 100644
index eecd3e9832a..00000000000
--- a/arch/riscv/dts/th1520-lichee-module-4a.dtsi
+++ /dev/null
@@ -1,164 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2023 Jisheng Zhang <[email protected]>
- */
-
-/dts-v1/;
-
-#include "th1520.dtsi"
-
-/ {
-	model = "Sipeed Lichee Module 4A";
-	compatible = "sipeed,lichee-module-4a", "thead,th1520";
-
-	aliases {
-		ethernet0 = &gmac0;
-		ethernet1 = &gmac1;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x00000000 0x2 0x00000000>;
-		bootph-pre-ram;
-	};
-};
-
-&osc {
-	clock-frequency = <24000000>;
-};
-
-&osc_32k {
-	clock-frequency = <32768>;
-};
-
-&emmc {
-	bus-width = <8>;
-	max-frequency = <198000000>;
-	mmc-ddr-1_8v;
-	mmc-hs400-1_8v;
-	mmc-hs400-enhanced-strobe;
-	non-removable;
-	no-sdio;
-	no-sd;
-	status = "okay";
-};
-
-&gmac0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac0_pins>, <&mdio0_pins>;
-	phy-handle = <&phy0>;
-	phy-mode = "rgmii-id";
-	status = "okay";
-};
-
-&gmac1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac1_pins>;
-	phy-handle = <&phy1>;
-	phy-mode = "rgmii-id";
-	status = "okay";
-};
-
-&mdio0 {
-	phy0: ethernet-phy@1 {
-		reg = <1>;
-	};
-
-	phy1: ethernet-phy@2 {
-		reg = <2>;
-	};
-};
-
-&padctrl0_apsys {
-	gmac0_pins: gmac0-0 {
-		tx-pins {
-			pins = "GMAC0_TX_CLK",
-			       "GMAC0_TXEN",
-			       "GMAC0_TXD0",
-			       "GMAC0_TXD1",
-			       "GMAC0_TXD2",
-			       "GMAC0_TXD3";
-			function = "gmac0";
-			bias-disable;
-			drive-strength = <25>;
-			input-disable;
-			input-schmitt-disable;
-			slew-rate = <0>;
-		};
-
-		rx-pins {
-			pins = "GMAC0_RX_CLK",
-			       "GMAC0_RXDV",
-			       "GMAC0_RXD0",
-			       "GMAC0_RXD1",
-			       "GMAC0_RXD2",
-			       "GMAC0_RXD3";
-			function = "gmac0";
-			bias-disable;
-			drive-strength = <1>;
-			input-enable;
-			input-schmitt-disable;
-			slew-rate = <0>;
-		};
-	};
-
-	gmac1_pins: gmac1-0 {
-		tx-pins {
-			pins = "GPIO2_18", /* GMAC1_TX_CLK */
-			       "GPIO2_20", /* GMAC1_TXEN */
-			       "GPIO2_21", /* GMAC1_TXD0 */
-			       "GPIO2_22", /* GMAC1_TXD1 */
-			       "GPIO2_23", /* GMAC1_TXD2 */
-			       "GPIO2_24"; /* GMAC1_TXD3 */
-			function = "gmac1";
-			bias-disable;
-			drive-strength = <25>;
-			input-disable;
-			input-schmitt-disable;
-			slew-rate = <0>;
-		};
-
-		rx-pins {
-			pins = "GPIO2_19", /* GMAC1_RX_CLK */
-			       "GPIO2_25", /* GMAC1_RXDV */
-			       "GPIO2_30", /* GMAC1_RXD0 */
-			       "GPIO2_31", /* GMAC1_RXD1 */
-			       "GPIO3_0",  /* GMAC1_RXD2 */
-			       "GPIO3_1";  /* GMAC1_RXD3 */
-			function = "gmac1";
-			bias-disable;
-			drive-strength = <1>;
-			input-enable;
-			input-schmitt-disable;
-			slew-rate = <0>;
-		};
-	};
-
-	mdio0_pins: mdio0-0 {
-		mdc-pins {
-			pins = "GMAC0_MDC";
-			function = "gmac0";
-			bias-disable;
-			drive-strength = <13>;
-			input-disable;
-			input-schmitt-disable;
-			slew-rate = <0>;
-		};
-
-		mdio-pins {
-			pins = "GMAC0_MDIO";
-			function = "gmac0";
-			bias-disable;
-			drive-strength = <13>;
-			input-enable;
-			input-schmitt-enable;
-			slew-rate = <0>;
-		};
-	};
-};
-
-&sdio0 {
-	bus-width = <4>;
-	max-frequency = <198000000>;
-	status = "okay";
-};
diff --git a/arch/riscv/dts/th1520-lichee-pi-4a-u-boot.dtsi b/arch/riscv/dts/th1520-lichee-pi-4a-u-boot.dtsi
new file mode 100644
index 00000000000..06d4a70d1ea
--- /dev/null
+++ b/arch/riscv/dts/th1520-lichee-pi-4a-u-boot.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Yao Zi <[email protected]>
+ */
+
+#include "th1520-lichee-module-4a-u-boot.dtsi"
+#include "thead-th1520-binman.dtsi"
+
+&clk {
+	bootph-some-ram;
+};
+
+&padctrl0_apsys {
+	bootph-some-ram;
+};
+
+&uart0_pins {
+	bootph-some-ram;
+
+	tx-pins {
+		bootph-some-ram;
+	};
+
+	rx-pins {
+		bootph-some-ram;
+	};
+};
diff --git a/arch/riscv/dts/th1520-lichee-pi-4a.dts b/arch/riscv/dts/th1520-lichee-pi-4a.dts
deleted file mode 100644
index 49af88b7adf..00000000000
--- a/arch/riscv/dts/th1520-lichee-pi-4a.dts
+++ /dev/null
@@ -1,33 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2023 Jisheng Zhang <[email protected]>
- */
-
-#include "th1520-lichee-module-4a.dtsi"
-#include "thead-th1520-binman.dtsi"
-
-/ {
-	model = "Sipeed Lichee Pi 4A";
-	compatible = "sipeed,lichee-pi-4a", "sipeed,lichee-module-4a", "thead,th1520";
-
-	aliases {
-		gpio0 = &gpio0;
-		gpio1 = &gpio1;
-		gpio2 = &gpio2;
-		gpio3 = &gpio3;
-		serial0 = &uart0;
-		serial1 = &uart1;
-		serial2 = &uart2;
-		serial3 = &uart3;
-		serial4 = &uart4;
-		serial5 = &uart5;
-	};
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-	};
-};
-
-&uart0 {
-	status = "okay";
-};
diff --git a/arch/riscv/dts/th1520-u-boot.dtsi b/arch/riscv/dts/th1520-u-boot.dtsi
new file mode 100644
index 00000000000..45ffccbb847
--- /dev/null
+++ b/arch/riscv/dts/th1520-u-boot.dtsi
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Yao Zi <[email protected]>
+ */
+
+&{/soc} {
+	ddrc: ddrc@fffd000000 {
+		compatible = "thead,th1520-ddrc";
+		reg = <0xff 0xfd000000 0x0 0x1000000>,
+		      <0xff 0xfe000000 0x0 0x1000000>,
+		      <0xff 0xff000000 0x0 0x4000>,
+		      <0xff 0xff005000 0x0 0x1000>;
+		reg-names = "phy-0", "phy-1", "ctrl", "sys";
+		bootph-pre-ram;
+	};
+};
+
+&cpus {
+	bootph-pre-ram;
+};
+
+&c910_0 {
+	bootph-pre-ram;
+};
+
+&c910_1 {
+	bootph-pre-ram;
+};
+
+&c910_2 {
+	bootph-pre-ram;
+};
+
+&c910_3 {
+	bootph-pre-ram;
+};
+
+&clint {
+	bootph-pre-ram;
+};
+
+&uart0 {
+	bootph-pre-ram;
+};
diff --git a/arch/riscv/dts/th1520.dtsi b/arch/riscv/dts/th1520.dtsi
deleted file mode 100644
index c46925a132a..00000000000
--- a/arch/riscv/dts/th1520.dtsi
+++ /dev/null
@@ -1,530 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2021 Alibaba Group Holding Limited.
- * Copyright (C) 2023 Jisheng Zhang <[email protected]>
- */
-
-#include <dt-bindings/clock/thead,th1520-clk-ap.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-/ {
-	compatible = "thead,th1520";
-	#address-cells = <2>;
-	#size-cells = <2>;
-
-	cpus: cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		bootph-pre-ram;
-		timebase-frequency = <3000000>;
-
-		c910_0: cpu@0 {
-			compatible = "thead,c910", "riscv";
-			device_type = "cpu";
-			riscv,isa = "rv64imafdc";
-			reg = <0>;
-			bootph-pre-ram;
-			i-cache-block-size = <64>;
-			i-cache-size = <65536>;
-			i-cache-sets = <512>;
-			d-cache-block-size = <64>;
-			d-cache-size = <65536>;
-			d-cache-sets = <512>;
-			next-level-cache = <&l2_cache>;
-			mmu-type = "riscv,sv39";
-
-			cpu0_intc: interrupt-controller {
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-		};
-
-		c910_1: cpu@1 {
-			compatible = "thead,c910", "riscv";
-			device_type = "cpu";
-			riscv,isa = "rv64imafdc";
-			reg = <1>;
-			bootph-pre-ram;
-			i-cache-block-size = <64>;
-			i-cache-size = <65536>;
-			i-cache-sets = <512>;
-			d-cache-block-size = <64>;
-			d-cache-size = <65536>;
-			d-cache-sets = <512>;
-			next-level-cache = <&l2_cache>;
-			mmu-type = "riscv,sv39";
-
-			cpu1_intc: interrupt-controller {
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-		};
-
-		c910_2: cpu@2 {
-			compatible = "thead,c910", "riscv";
-			device_type = "cpu";
-			riscv,isa = "rv64imafdc";
-			reg = <2>;
-			bootph-pre-ram;
-			i-cache-block-size = <64>;
-			i-cache-size = <65536>;
-			i-cache-sets = <512>;
-			d-cache-block-size = <64>;
-			d-cache-size = <65536>;
-			d-cache-sets = <512>;
-			next-level-cache = <&l2_cache>;
-			mmu-type = "riscv,sv39";
-
-			cpu2_intc: interrupt-controller {
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-		};
-
-		c910_3: cpu@3 {
-			compatible = "thead,c910", "riscv";
-			device_type = "cpu";
-			riscv,isa = "rv64imafdc";
-			reg = <3>;
-			bootph-pre-ram;
-			i-cache-block-size = <64>;
-			i-cache-size = <65536>;
-			i-cache-sets = <512>;
-			d-cache-block-size = <64>;
-			d-cache-size = <65536>;
-			d-cache-sets = <512>;
-			next-level-cache = <&l2_cache>;
-			mmu-type = "riscv,sv39";
-
-			cpu3_intc: interrupt-controller {
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-		};
-
-		l2_cache: l2-cache {
-			compatible = "cache";
-			cache-block-size = <64>;
-			cache-level = <2>;
-			cache-size = <1048576>;
-			cache-sets = <1024>;
-			cache-unified;
-		};
-	};
-
-	osc: oscillator {
-		compatible = "fixed-clock";
-		clock-output-names = "osc_24m";
-		#clock-cells = <0>;
-	};
-
-	osc_32k: 32k-oscillator {
-		compatible = "fixed-clock";
-		clock-output-names = "osc_32k";
-		#clock-cells = <0>;
-	};
-
-	aonsys_clk: clock-73728000 {
-		compatible = "fixed-clock";
-		clock-frequency = <73728000>;
-		clock-output-names = "aonsys_clk";
-		#clock-cells = <0>;
-	};
-
-	soc {
-		compatible = "simple-bus";
-		interrupt-parent = <&plic>;
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
-
-		plic: interrupt-controller@ffd8000000 {
-			compatible = "thead,th1520-plic", "thead,c900-plic";
-			reg = <0xff 0xd8000000 0x0 0x01000000>;
-			interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>,
-					      <&cpu1_intc 11>, <&cpu1_intc 9>,
-					      <&cpu2_intc 11>, <&cpu2_intc 9>,
-					      <&cpu3_intc 11>, <&cpu3_intc 9>;
-			interrupt-controller;
-			#address-cells = <0>;
-			#interrupt-cells = <2>;
-			riscv,ndev = <240>;
-		};
-
-		clint: timer@ffdc000000 {
-			compatible = "thead,th1520-clint", "thead,c900-clint";
-			reg = <0xff 0xdc000000 0x0 0x00010000>;
-			bootph-pre-ram;
-			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
-					      <&cpu1_intc 3>, <&cpu1_intc 7>,
-					      <&cpu2_intc 3>, <&cpu2_intc 7>,
-					      <&cpu3_intc 3>, <&cpu3_intc 7>;
-		};
-
-		uart0: serial@ffe7014000 {
-			compatible = "snps,dw-apb-uart";
-			reg = <0xff 0xe7014000 0x0 0x100>;
-			bootph-pre-ram;
-			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART0_PCLK>;
-			clock-names = "buadclk", "apb_pclk";
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		gmac1: ethernet@ffe7060000 {
-			compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";
-			reg = <0xff 0xe7060000 0x0 0x2000>, <0xff 0xec004000 0x0 0x1000>;
-			reg-names = "dwmac", "apb";
-			interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "macirq";
-			clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC1>;
-			clock-names = "stmmaceth", "pclk";
-			snps,pbl = <32>;
-			snps,fixed-burst;
-			snps,multicast-filter-bins = <64>;
-			snps,perfect-filter-entries = <32>;
-			status = "disabled";
-
-			mdio1: mdio {
-				compatible = "snps,dwmac-mdio";
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-		};
-
-		gmac0: ethernet@ffe7070000 {
-			compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";
-			reg = <0xff 0xe7070000 0x0 0x2000>, <0xff 0xec003000 0x0 0x1000>;
-			reg-names = "dwmac", "apb";
-			interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "macirq";
-			clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC0>;
-			clock-names = "stmmaceth", "pclk";
-			snps,pbl = <32>;
-			snps,fixed-burst;
-			snps,multicast-filter-bins = <64>;
-			snps,perfect-filter-entries = <32>;
-			status = "disabled";
-
-			mdio0: mdio {
-				compatible = "snps,dwmac-mdio";
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-		};
-
-		emmc: mmc@ffe7080000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe7080000 0x0 0x10000>;
-			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk CLK_EMMC_SDIO>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
-		sdio0: mmc@ffe7090000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe7090000 0x0 0x10000>;
-			interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk CLK_EMMC_SDIO>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
-		sdio1: mmc@ffe70a0000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe70a0000 0x0 0x10000>;
-			interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk CLK_EMMC_SDIO>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
-		uart1: serial@ffe7f00000 {
-			compatible = "snps,dw-apb-uart";
-			reg = <0xff 0xe7f00000 0x0 0x100>;
-			interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART1_PCLK>;
-			clock-names = "buadclk", "apb_pclk";
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		uart3: serial@ffe7f04000 {
-			compatible = "snps,dw-apb-uart";
-			reg = <0xff 0xe7f04000 0x0 0x100>;
-			interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART3_PCLK>;
-			clock-names = "buadclk", "apb_pclk";
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		gpio2: gpio@ffe7f34000 {
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xff 0xe7f34000 0x0 0x1000>;
-			clocks = <&clk CLK_GPIO2>;
-			clock-names = "bus";
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			portc: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				ngpios = <32>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
-			};
-		};
-
-		gpio3: gpio@ffe7f38000 {
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xff 0xe7f38000 0x0 0x1000>;
-			clocks = <&clk CLK_GPIO3>;
-			clock-names = "bus";
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			portd: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				ngpios = <32>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
-			};
-		};
-
-		padctrl1_apsys: pinctrl@ffe7f3c000 {
-			compatible = "thead,th1520-pinctrl";
-			reg = <0xff 0xe7f3c000 0x0 0x1000>;
-			clocks = <&clk CLK_PADCTRL1>;
-			thead,pad-group = <2>;
-		};
-
-		gpio0: gpio@ffec005000 {
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xff 0xec005000 0x0 0x1000>;
-			clocks = <&clk CLK_GPIO0>;
-			clock-names = "bus";
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			porta: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				ngpios = <32>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
-			};
-		};
-
-		gpio1: gpio@ffec006000 {
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xff 0xec006000 0x0 0x1000>;
-			clocks = <&clk CLK_GPIO1>;
-			clock-names = "bus";
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			portb: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				ngpios = <32>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <57 IRQ_TYPE_LEVEL_HIGH>;
-			};
-		};
-
-		padctrl0_apsys: pinctrl@ffec007000 {
-			compatible = "thead,th1520-pinctrl";
-			reg = <0xff 0xec007000 0x0 0x1000>;
-			clocks = <&clk CLK_PADCTRL0>;
-			thead,pad-group = <3>;
-		};
-
-		uart2: serial@ffec010000 {
-			compatible = "snps,dw-apb-uart";
-			reg = <0xff 0xec010000 0x0 0x4000>;
-			interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART2_PCLK>;
-			clock-names = "buadclk", "apb_pclk";
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		clk: clock-controller@ffef010000 {
-			compatible = "thead,th1520-clk-ap";
-			reg = <0xff 0xef010000 0x0 0x1000>;
-			clocks = <&osc>;
-			#clock-cells = <1>;
-		};
-
-		timer0: timer@ffefc32000 {
-			compatible = "snps,dw-apb-timer";
-			reg = <0xff 0xefc32000 0x0 0x14>;
-			clocks = <&clk CLK_PERI_APB_PCLK>;
-			clock-names = "timer";
-			interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		timer1: timer@ffefc32014 {
-			compatible = "snps,dw-apb-timer";
-			reg = <0xff 0xefc32014 0x0 0x14>;
-			clocks = <&clk CLK_PERI_APB_PCLK>;
-			clock-names = "timer";
-			interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		timer2: timer@ffefc32028 {
-			compatible = "snps,dw-apb-timer";
-			reg = <0xff 0xefc32028 0x0 0x14>;
-			clocks = <&clk CLK_PERI_APB_PCLK>;
-			clock-names = "timer";
-			interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		timer3: timer@ffefc3203c {
-			compatible = "snps,dw-apb-timer";
-			reg = <0xff 0xefc3203c 0x0 0x14>;
-			clocks = <&clk CLK_PERI_APB_PCLK>;
-			clock-names = "timer";
-			interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		uart4: serial@fff7f08000 {
-			compatible = "snps,dw-apb-uart";
-			reg = <0xff 0xf7f08000 0x0 0x4000>;
-			interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART4_PCLK>;
-			clock-names = "buadclk", "apb_pclk";
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		uart5: serial@fff7f0c000 {
-			compatible = "snps,dw-apb-uart";
-			reg = <0xff 0xf7f0c000 0x0 0x4000>;
-			interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART5_PCLK>;
-			clock-names = "buadclk", "apb_pclk";
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			status = "disabled";
-		};
-
-		ddrc: ddrc@fffd000000 {
-			compatible = "thead,th1520-ddrc";
-			reg = <0xff 0xfd000000 0x0 0x1000000>,
-			      <0xff 0xfe000000 0x0 0x1000000>,
-			      <0xff 0xff000000 0x0 0x4000>,
-			      <0xff 0xff005000 0x0 0x1000>;
-			reg-names = "phy-0", "phy-1", "ctrl", "sys";
-			bootph-pre-ram;
-		};
-
-		timer4: timer@ffffc33000 {
-			compatible = "snps,dw-apb-timer";
-			reg = <0xff 0xffc33000 0x0 0x14>;
-			clocks = <&clk CLK_PERI_APB_PCLK>;
-			clock-names = "timer";
-			interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		timer5: timer@ffffc33014 {
-			compatible = "snps,dw-apb-timer";
-			reg = <0xff 0xffc33014 0x0 0x14>;
-			clocks = <&clk CLK_PERI_APB_PCLK>;
-			clock-names = "timer";
-			interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		timer6: timer@ffffc33028 {
-			compatible = "snps,dw-apb-timer";
-			reg = <0xff 0xffc33028 0x0 0x14>;
-			clocks = <&clk CLK_PERI_APB_PCLK>;
-			clock-names = "timer";
-			interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		timer7: timer@ffffc3303c {
-			compatible = "snps,dw-apb-timer";
-			reg = <0xff 0xffc3303c 0x0 0x14>;
-			clocks = <&clk CLK_PERI_APB_PCLK>;
-			clock-names = "timer";
-			interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		ao_gpio0: gpio@fffff41000 {
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xff 0xfff41000 0x0 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			porte: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				ngpios = <32>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
-			};
-		};
-
-		padctrl_aosys: pinctrl@fffff4a000 {
-			compatible = "thead,th1520-pinctrl";
-			reg = <0xff 0xfff4a000 0x0 0x2000>;
-			clocks = <&aonsys_clk>;
-			thead,pad-group = <1>;
-		};
-
-		ao_gpio1: gpio@fffff52000 {
-			compatible = "snps,dw-apb-gpio";
-			reg = <0xff 0xfff52000 0x0 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			portf: gpio-controller@0 {
-				compatible = "snps,dw-apb-gpio-port";
-				gpio-controller;
-				#gpio-cells = <2>;
-				ngpios = <32>;
-				reg = <0>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
-			};
-		};
-	};
-};
diff --git a/arch/riscv/include/asm/encoding.h b/arch/riscv/include/asm/encoding.h
index 56c5da86e86..ae3e5bce5c1 100644
--- a/arch/riscv/include/asm/encoding.h
+++ b/arch/riscv/include/asm/encoding.h
@@ -95,7 +95,6 @@
 #define DEFAULT_MTVEC		0x00001010
 #define CFG_STRING_ADDR	0x0000100C
 #define EXT_IO_BASE		0x40000000
-#define DRAM_BASE		0x80000000
 
 // page table entry (PTE) fields
 #define PTE_V		0x001 // Valid
diff --git a/board/microchip/mpfs_icicle/Kconfig b/board/microchip/mpfs_generic/Kconfig
index 760dffc488b..8dcf55a0311 100644
--- a/board/microchip/mpfs_icicle/Kconfig
+++ b/board/microchip/mpfs_generic/Kconfig
@@ -1,7 +1,7 @@
-if TARGET_MICROCHIP_ICICLE
+if TARGET_MICROCHIP_GENERIC
 
 config SYS_BOARD
-	default "mpfs_icicle"
+	default "mpfs_generic"
 
 config SYS_VENDOR
 	default "microchip"
@@ -10,7 +10,7 @@ config SYS_CPU
 	default "generic"
 
 config SYS_CONFIG_NAME
-	default "microchip_mpfs_icicle"
+	default "microchip_mpfs_generic"
 
 config TEXT_BASE
 	default 0x80000000 if !RISCV_SMODE
diff --git a/board/microchip/mpfs_generic/MAINTAINERS b/board/microchip/mpfs_generic/MAINTAINERS
new file mode 100644
index 00000000000..3de99144c41
--- /dev/null
+++ b/board/microchip/mpfs_generic/MAINTAINERS
@@ -0,0 +1,7 @@
+Microchip MPFS Generic
+M:	Conor Dooley <[email protected]>
+M:	Jamie Gibbons <[email protected]>
+S:	Maintained
+F:	board/microchip/mpfs_generic/
+F:	include/configs/microchip_mpfs_generic.h
+F:	configs/microchip_mpfs_generic_defconfig
diff --git a/board/microchip/mpfs_icicle/Makefile b/board/microchip/mpfs_generic/Makefile
index 72b0410dda8..dfe4b2634e6 100644
--- a/board/microchip/mpfs_icicle/Makefile
+++ b/board/microchip/mpfs_generic/Makefile
@@ -4,4 +4,4 @@
 # Padmarao Begari <[email protected]>
 #
 
-obj-y	+= mpfs_icicle.o
+obj-y	+= mpfs_generic.o
diff --git a/board/microchip/mpfs_icicle/mpfs_icicle.c b/board/microchip/mpfs_generic/mpfs_generic.c
index 739a9b6cd76..fac4b6aecba 100644
--- a/board/microchip/mpfs_icicle/mpfs_icicle.c
+++ b/board/microchip/mpfs_generic/mpfs_generic.c
@@ -172,6 +172,8 @@ int board_late_init(void)
 		}
 	}
 
+	mpfs_syscontroller_process_dtbo(sys_serv_priv);
+
 	return 0;
 }
 
diff --git a/board/microchip/mpfs_icicle/MAINTAINERS b/board/microchip/mpfs_icicle/MAINTAINERS
deleted file mode 100644
index d092b5a8111..00000000000
--- a/board/microchip/mpfs_icicle/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-Microchip MPFS icicle
-M:	Conor Dooley <[email protected]>
-M:	Cyril Jean <[email protected]>
-S:	Maintained
-F:	board/microchip/mpfs_icicle/
-F:	include/configs/microchip_mpfs_icicle.h
-F:	configs/microchip_mpfs_icicle_defconfig
diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c
index 3dfa931b655..fe14b44ce28 100644
--- a/board/starfive/visionfive2/spl.c
+++ b/board/starfive/visionfive2/spl.c
@@ -23,7 +23,8 @@ DECLARE_GLOBAL_DATA_PTR;
 void spl_perform_fixups(struct spl_image_info *spl_image)
 {
 	/* Update the memory size which read from eeprom or DT */
-	fdt_fixup_memory(spl_image->fdt_addr, 0x40000000, gd->ram_size);
+	if (spl_image->fdt_addr)
+		fdt_fixup_memory(spl_image->fdt_addr, 0x40000000, gd->ram_size);
 }
 
 static void jh7110_jtag_init(void)
diff --git a/configs/ibex-ast2700_defconfig b/configs/ibex-ast2700_defconfig
index 8e8259f291d..088eec1ec70 100644
--- a/configs/ibex-ast2700_defconfig
+++ b/configs/ibex-ast2700_defconfig
@@ -22,7 +22,8 @@ CONFIG_SYS_MEM_TOP_HIDE=0x10000000
 CONFIG_BUILD_TARGET=""
 CONFIG_TARGET_ASPEED_AST2700_IBEX=y
 # CONFIG_RISCV_ISA_F is not set
-# CONFIG_RISCV_ISA_A is not set
+# CONFIG_RISCV_ISA_ZAAMO is not set
+# CONFIG_RISCV_ISA_ZALRSC is not set
 # CONFIG_SPL_SMP is not set
 CONFIG_XIP=y
 CONFIG_SPL_XIP=y
diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_generic_defconfig
index 9f933592c9d..22f67414a7c 100644
--- a/configs/microchip_mpfs_icicle_defconfig
+++ b/configs/microchip_mpfs_generic_defconfig
@@ -9,7 +9,7 @@ CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_SYS_LOAD_ADDR=0x80200000
 CONFIG_SYS_MEM_TOP_HIDE=0x400000
 # CONFIG_DEBUG_UART is not set
-CONFIG_TARGET_MICROCHIP_ICICLE=y
+CONFIG_TARGET_MICROCHIP_GENERIC=y
 CONFIG_ARCH_RV64I=y
 CONFIG_RISCV_SMODE=y
 CONFIG_FIT=y
@@ -22,6 +22,9 @@ CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_SYS_PROMPT="RISC-V # "
 CONFIG_OF_UPSTREAM=y
+CONFIG_OF_BOARD=y
+CONFIG_OF_LIST="microchip/mpfs-icicle-kit microchip/mpfs-sev-kit"
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_OVERWRITE_ETHADDR_ONCE=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
index 544140c03f7..03fcec7f121 100644
--- a/configs/starfive_visionfive2_defconfig
+++ b/configs/starfive_visionfive2_defconfig
@@ -78,6 +78,7 @@ CONFIG_CMD_WDT=y
 CONFIG_CMD_WGET=y
 CONFIG_CMD_BOOTSTAGE=y
 CONFIG_OF_BOARD=y
+CONFIG_DEVICE_TREE_INCLUDES="starfive-visionfive2-u-boot.dtsi"
 CONFIG_OF_LIST="starfive/jh7110-deepcomputing-fml13v01 starfive/jh7110-milkv-mars starfive/jh7110-pine64-star64 starfive/jh7110-starfive-visionfive-2-v1.2a starfive/jh7110-starfive-visionfive-2-v1.3b"
 CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_OVERWRITE=y
diff --git a/configs/th1520_lpi4a_defconfig b/configs/th1520_lpi4a_defconfig
index 48cd8991591..919f866d0bf 100644
--- a/configs/th1520_lpi4a_defconfig
+++ b/configs/th1520_lpi4a_defconfig
@@ -1,12 +1,12 @@
 CONFIG_RISCV=y
 CONFIG_SYS_MALLOC_LEN=0x800000
-CONFIG_SYS_MALLOC_F_LEN=0x3000
+CONFIG_SYS_MALLOC_F_LEN=0x10000
 CONFIG_SPL_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
 CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="th1520-lichee-pi-4a"
+CONFIG_DEFAULT_DEVICE_TREE="thead/th1520-lichee-pi-4a"
 CONFIG_SPL_STACK=0xffe0170000
 CONFIG_SPL_BSS_START_ADDR=0xffe0160000
 CONFIG_SPL_BSS_MAX_SIZE=0x10000
diff --git a/doc/board/microchip/index.rst b/doc/board/microchip/index.rst
index affc5a9e014..571b8877f08 100644
--- a/doc/board/microchip/index.rst
+++ b/doc/board/microchip/index.rst
@@ -7,3 +7,4 @@ Microchip
    :maxdepth: 2
 
    mpfs_icicle
+   mpfs_video
diff --git a/doc/board/microchip/mpfs_build_boot.rst b/doc/board/microchip/mpfs_build_boot.rst
new file mode 100644
index 00000000000..1239f675ec8
--- /dev/null
+++ b/doc/board/microchip/mpfs_build_boot.rst
@@ -0,0 +1,29 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Booting from eMMC using HSS
+---------------------------
+
+Building U-Boot
+~~~~~~~~~~~~~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix>
+
+3. make microchip_mpfs_generic_defconfig
+4. make
+
+Flashing
+~~~~~~~~
+
+The current U-Boot port is supported in S-mode only and loaded from DRAM.
+
+A prior stage M-mode firmware/bootloader (e.g HSS with OpenSBI) is required to
+boot the u-boot.bin in S-mode.
+
+Currently, the u-boot.bin is used as a payload of the HSS firmware (Microchip
+boot-flow) and OpenSBI generic platform fw_payload.bin (with u-boot.bin embedded)
+as HSS payload (Custom boot-flow)
diff --git a/doc/board/microchip/mpfs_common.rst b/doc/board/microchip/mpfs_common.rst
new file mode 100644
index 00000000000..edbaf043966
--- /dev/null
+++ b/doc/board/microchip/mpfs_common.rst
@@ -0,0 +1,666 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Creating the HSS payload - Custom boot-flow
+'''''''''''''''''''''''''''''''''''''''''''
+
+1. You will be creating a payload from `fw_payload.bin`.
+   Copy this file to the HSS/tools/hss-payload-generator/test directory.
+2. Go to hss-payload-generator source directory.
+
+.. code-block:: none
+
+   cd hart-software-services/tools/hss-payload-generator
+
+3. Edit test/uboot.yaml file for hart entry points and correct name of the binary file.
+
+	hart-entry-points: {u54_1: '0x80000000', u54_2: '0x80000000', u54_3: '0x80000000', u54_4: '0x80000000'}
+
+	payloads:
+	test/fw_payload.bin: {exec-addr: '0x80000000', owner-hart: u54_1, secondary-hart: u54_2, secondary-hart: u54_3, secondary-hart: u54_4, priv-mode: prv_m}
+
+4. Generate payload
+
+.. code-block:: none
+
+   ./hss-payload-generator -c test/uboot.yaml payload.bin
+
+Once the payload binary is generated, it should be copied to the eMMC.
+
+Please refer to HSS documenation to build the HSS firmware for payload.
+(Note: HSS git repo is at https://github.com/polarfire-soc/hart-software-services/blob/master/tools/hss-payload-generator/README.md
+and also refer the HSS payload generator at https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/software-development/hss-payloads.md)
+
+Program eMMC with HSS Payload
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Program eMMC with payload binary is explained in the PolarFire SoC documentation.
+(Note: PolarFire SoC Documentation git repo is at https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/boards/mpfs-icicle-kit-es/updating-icicle-kit/updating-icicle-kit-design-and-linux.md#eMMC)
+
+Once the payload image is copied to the eMMC, press CTRL+C in the HSS command
+line interface, then type 'boot' and enter to boot the newly copied image.
+
+.. code-block:: none
+
+    sudo dd if=<payload_binary> of=/dev/sdX bs=512
+
+GUID type with HSS Payload
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The HSS always picks up HSS payload from a GPT partition with
+GUID type "21686148-6449-6E6F-744E-656564454649" or sector '0' of the eMMC if no
+GPT partition.
+
+Booting with HSS Payload
+~~~~~~~~~~~~~~~~~~~~~~~~
+
+You should see the U-Boot prompt on UART1.
+(Note: UART0 is reserved for HSS)
+
+Sample boot log from MPFS Icicle Kit
+''''''''''''''''''''''''''''''''''''
+
+.. code-block:: none
+
+   U-Boot 2021.01-00314-g7303332537-dirty (Jan 14 2021 - 10:09:43 +0530)
+
+   CPU:   rv64imafdc
+   Model: Microchip MPFS Icicle Kit
+   DRAM:  1 GiB
+   MMC:   sdhc@20008000: 0
+   In:    serial@20100000
+   Out:   serial@20100000
+   Err:   serial@20100000
+   Net:   eth0: ethernet@20112000
+   Hit any key to stop autoboot:  0
+
+Now you can configure your networking, tftp server and use tftp boot method to
+load uImage (with initramfs).
+
+.. code-block:: none
+
+   RISC-V # setenv kernel_addr_r 0x80200000
+   RISC-V # setenv fdt_addr_r 0x82200000
+
+   RISC-V # setenv ipaddr 192.168.1.5
+   RISC-V # setenv netmask 255.255.255.0
+   RISC-V # setenv serverip 192.168.1.3
+   RISC-V # setenv gateway 192.168.1.1
+
+   RISC-V # tftpboot ${kernel_addr_r} uImage
+   ethernet@20112000: PHY present at 9
+   ethernet@20112000: Starting autonegotiation...
+   ethernet@20112000: Autonegotiation complete
+   ethernet@20112000: link up, 1000Mbps full-duplex (lpa: 0x7800)
+   Using ethernet@20112000 device
+   TFTP from server 192.168.1.3; our IP address is 192.168.1.5
+   Filename 'uImage'.
+   Load address: 0x80200000
+   Loading: #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    ############
+	    6.4 MiB/s
+   done
+   Bytes transferred = 14482480 (dcfc30 hex)
+
+   RISC-V # tftpboot ${fdt_addr_r} mpfs-icicle-kit.dtb
+   ethernet@20112000: PHY present at 9
+   ethernet@20112000: Starting autonegotiation...
+   ethernet@20112000: Autonegotiation complete
+   ethernet@20112000: link up, 1000Mbps full-duplex (lpa: 0x7800)
+   Using ethernet@20112000 device
+   TFTP from server 192.168.1.3; our IP address is 192.168.1.5
+   Filename 'mpfs-icicle-kit.dtb'.
+   Load address: 0x82200000
+   Loading: #
+			2.5 MiB/s
+   done
+   Bytes transferred = 10282 (282a hex)
+
+   RISC-V # bootm ${kernel_addr_r} - ${fdt_addr_r}
+   ## Booting kernel from Legacy Image at 80200000 ...
+		Image Name:   Linux
+		Image Type:   RISC-V Linux Kernel Image (uncompressed)
+		Data Size:    14482416 Bytes = 13.8 MiB
+		Load Address: 80200000
+		Entry Point:  80200000
+		Verifying Checksum ... OK
+   ## Flattened Device Tree blob at 82200000
+		Booting using the fdt blob at 0x82200000
+		Loading Kernel Image
+		Using Device Tree in place at 000000008fffa000, end 000000008ffff829 ... OK
+
+   Starting kernel ...
+
+   [    0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
+   [    0.000000] Linux version 5.6.17 (padmarao@padmarao-VirtualBox) (gcc version 7.2.0 (GCC)) #2 SMP Tue Jun 16 21:27:50 IST 2020
+   [    0.000000] initrd not found or empty - disabling initrd
+   [    0.000000] Zone ranges:
+   [    0.000000]   DMA32    [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000]   Normal   empty
+   [    0.000000] Movable zone start for each node
+   [    0.000000] Early memory node ranges
+   [    0.000000]   node   0: [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000] software IO TLB: mapped [mem 0xbb1f5000-0xbf1f5000] (64MB)
+   [    0.000000] elf_hwcap is 0x112d
+   [    0.000000] percpu: Embedded 14 pages/cpu s24856 r0 d32488 u57344
+   [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 258055
+   [    0.000000] Kernel command line: console=ttyS0,115200n8
+   [    0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
+   [    0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
+   [    0.000000] Sorting __ex_table...
+   [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
+   [    0.000000] Memory: 950308K/1046528K available (3289K kernel code, 212K rwdata, 900K rodata, 9476K init, 250K bss, 96220K reserved, 0K cma-reserved)
+   [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
+   [    0.000000] rcu: Hierarchical RCU implementation.
+   [    0.000000] rcu: 	RCU event tracing is enabled.
+   [    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
+   [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
+   [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
+   [    0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0
+   [    0.000000] plic: mapped 186 interrupts with 4 handlers for 9 contexts.
+   [    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [1]
+   [    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns
+   [    0.000015] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns
+   [    0.000311] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=10000)
+   [    0.000349] pid_max: default: 32768 minimum: 301
+   [    0.000846] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
+   [    0.000964] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
+   [    0.005630] rcu: Hierarchical SRCU implementation.
+   [    0.006901] smp: Bringing up secondary CPUs ...
+   [    0.012545] smp: Brought up 1 node, 4 CPUs
+   [    0.014431] devtmpfs: initialized
+   [    0.020526] random: get_random_bytes called from setup_net+0x36/0x192 with crng_init=0
+   [    0.020928] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
+   [    0.020999] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
+   [    0.022768] NET: Registered protocol family 16
+   [    0.035478] microchip-pfsoc-clkcfg 20002000.clkcfg: Registered PFSOC core clocks
+   [    0.048429] SCSI subsystem initialized
+   [    0.049694] pps_core: LinuxPPS API ver. 1 registered
+   [    0.049719] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <[email protected]>
+   [    0.049780] PTP clock support registered
+   [    0.051781] clocksource: Switched to clocksource riscv_clocksource
+   [    0.055326] NET: Registered protocol family 2
+   [    0.056922] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
+   [    0.057053] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
+   [    0.057648] TCP bind hash table entries: 8192 (order: 5, 131072 bytes, linear)
+   [    0.058579] TCP: Hash tables configured (established 8192 bind 8192)
+   [    0.059648] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
+   [    0.059837] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
+   [    0.060707] NET: Registered protocol family 1
+   [    0.266229] workingset: timestamp_bits=62 max_order=18 bucket_order=0
+   [    0.287107] io scheduler mq-deadline registered
+   [    0.287140] io scheduler kyber registered
+   [    0.429601] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+   [    0.433979] printk: console [ttyS0] disabled
+   [    0.434154] 20000000.serial: ttyS0 at MMIO 0x20000000 (irq = 18, base_baud = 9375000) is a 16550A
+   [    0.928039] printk: console [ttyS0] enabled
+   [    0.939804] libphy: Fixed MDIO Bus: probed
+   [    0.948702] libphy: MACB_mii_bus: probed
+   [    0.993698] macb 20112000.ethernet eth0: Cadence GEM rev 0x0107010c at 0x20112000 irq 21 (56:34:12:00:fc:00)
+   [    1.006751] mousedev: PS/2 mouse device common for all mice
+   [    1.013803] i2c /dev entries driver
+   [    1.019451] sdhci: Secure Digital Host Controller Interface driver
+   [    1.027242] sdhci: Copyright(c) Pierre Ossman
+   [    1.032731] sdhci-pltfm: SDHCI platform and OF driver helper
+   [    1.091826] mmc0: SDHCI controller on 20008000.sdhc [20008000.sdhc] using ADMA 64-bit
+   [    1.102738] NET: Registered protocol family 17
+   [    1.170326] Freeing unused kernel memory: 9476K
+   [    1.176067] This architecture does not have kernel memory protection.
+   [    1.184157] Run /init as init process
+   Starting logging: OK
+   Starting mdev...
+   /etc/init.d/S10mdev: line 21: can't create /proc/sys/kernel/hotplug: nonexiste[    1.331981] mmc0: mmc_select_hs200 failed, error -74
+   nt directory
+   [    1.355011] mmc0: new MMC card at address 0001
+   [    1.363981] mmcblk0: mmc0:0001 DG4008 7.28 GiB
+   [    1.372248] mmcblk0boot0: mmc0:0001 DG4008 partition 1 4.00 MiB
+   [    1.382292] mmcblk0boot1: mmc0:0001 DG4008 partition 2 4.00 MiB
+   [    1.390265] mmcblk0rpmb: mmc0:0001 DG4008 partition 3 4.00 MiB, chardev (251:0)
+   [    1.425234] GPT:Primary header thinks Alt. header is not at the end of the disk.
+   [    1.434656] GPT:2255809 != 15273599
+   [    1.439038] GPT:Alternate GPT header not at the end of the disk.
+   [    1.446671] GPT:2255809 != 15273599
+   [    1.451048] GPT: Use GNU Parted to correct GPT errors.
+   [    1.457755]  mmcblk0: p1 p2 p3
+   sort: /sys/devices/platform/Fixed: No such file or directory
+   modprobe: can't change directory to '/lib/modules': No such file or directory
+   Initializing random number generator... [    2.830198] random: dd: uninitialized urandom read (512 bytes read)
+   done.
+   Starting network...
+   [    3.061867] macb 20112000.ethernet eth0: PHY [20112000.ethernet-ffffffff:09] driver [Vitesse VSC8662] (irq=POLL)
+   [    3.074674] macb 20112000.ethernet eth0: configuring for phy/sgmii link mode
+   [    3.084263] pps pps0: new PPS source ptp0
+   [    3.089710] macb 20112000.ethernet: gem-ptp-timer ptp clock registered.
+   udhcpc (v1.24.2) started
+   Sending discover...
+   Sending discover...
+   [    6.380169] macb 20112000.ethernet eth0: Link is Up - 1Gbps/Full - flow control tx
+   Sending discover...
+   Sending select for 192.168.1.2...
+   Lease of 192.168.1.2 obtained, lease time 86400
+   deleting routers
+   adding dns 192.168.1.1
+   Starting dropbear sshd: [   11.385619] random: dropbear: uninitialized urandom read (32 bytes read)
+   OK
+
+   Welcome to Buildroot
+   buildroot login: root
+   Password:
+   #
+
+Booting U-Boot and Linux from eMMC
+''''''''''''''''''''''''''''''''''
+
+FPGA design with HSS programming file and Linux Image
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/boards/mpfs-icicle-kit-es/updating-icicle-kit/updating-icicle-kit-design-and-linux.md
+
+The HSS firmware runs from the PolarFire SoC eNVM on reset.
+
+Program eMMC with Payload Binary and Linux Image
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Program eMMC with payload binary and Linux image is explained in the
+PolarFire SoC documentation.
+The payload binary should be copied to partition 2 of the eMMC.
+
+(Note: PolarFire SoC Documentation git repo is at https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/boards/mpfs-icicle-kit-es/updating-icicle-kit/updating-icicle-kit-design-and-linux.md#eMMC)
+
+Once the Linux image and payload binary is copied to the eMMC, press CTRL+C
+in the HSS command line interface, then type 'boot' and enter to boot the newly
+copied payload and Linux image.
+
+.. code-block:: none
+
+    zcat <linux-image>.wic.gz | sudo dd of=/dev/sdX bs=4096 iflag=fullblock oflag=direct conv=fsync status=progress
+
+    sudo dd if=<payload_binary> of=/dev/sdX2 bs=512
+
+You should see the U-Boot prompt on UART1.
+(Note: UART0 is reserved for HSS)
+
+GUID type with Payload Binary and Linux Image
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The HSS always picks up the HSS payload from a GPT partition with
+GUID type "21686148-6449-6E6F-744E-656564454649" or sector '0' of the eMMC if no
+GPT partition.
+
+Sample boot log from MPFS Icicle Kit 2
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. code-block:: none
+
+   U-Boot 2021.01-00314-g7303332537-dirty (Jan 14 2021 - 10:09:43 +0530)
+
+   CPU:   rv64imafdc
+   Model: Microchip MPFS Icicle Kit
+   DRAM:  1 GiB
+   MMC:   sdhc@20008000: 0
+   In:    serial@20100000
+   Out:   serial@20100000
+   Err:   serial@20100000
+   Net:   eth0: ethernet@20112000
+   Hit any key to stop autoboot:  0
+
+   RISC-V # mmc info
+   Device: sdhc@20008000
+   Manufacturer ID: 45
+   OEM: 100
+   Name: DG400
+   Bus Speed: 52000000
+   Mode: MMC High Speed (52MHz)
+   Rd Block Len: 512
+   MMC version 5.1
+   High Capacity: Yes
+   Capacity: 7.3 GiB
+   Bus Width: 4-bit
+   Erase Group Size: 512 KiB
+   HC WP Group Size: 8 MiB
+   User Capacity: 7.3 GiB WRREL
+   Boot Capacity: 4 MiB ENH
+   RPMB Capacity: 4 MiB ENH
+
+   RISC-V # mmc part
+   Partition Map for MMC device 0  --   Partition Type: EFI
+
+   Part	Start LBA	End LBA		Name
+		Attributes
+		Type GUID
+		Partition GUID
+	1	0x00002000	0x0000b031	"boot"
+		attrs:	0x0000000000000004
+		type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+		guid:	99ff6a94-f2e7-44dd-a7df-f3a2da106ef9
+	2	0x0000b032	0x0000f031	"primary"
+		attrs:	0x0000000000000000
+		type:	21686148-6449-6e6f-744e-656564454649
+		guid:	12006052-e64b-4423-beb0-b956ea00f1ba
+	3	0x00010000	0x00226b9f	"root"
+		attrs:	0x0000000000000000
+		type:	0fc63daf-8483-4772-8e79-3d69d8477de4
+		guid:	dd2c5619-2272-4c3c-8dc2-e21942e17ce6
+
+   RISC-V # load mmc 0 ${ramdisk_addr_r} fitimage
+   RISC-V # bootm ${ramdisk_addr_r}
+   ## Loading kernel from FIT Image at 88300000 ...
+   Using 'conf@microchip_icicle-kit-es-a000-microchip.dtb' configuration
+   Trying 'kernel@1' kernel subimage
+     Description:  Linux kernel
+     Type:         Kernel Image
+     Compression:  gzip compressed
+     Data Start:   0x883000fc
+     Data Size:    3574555 Bytes = 3.4 MiB
+     Architecture: RISC-V
+     OS:           Linux
+     Load Address: 0x80200000
+     Entry Point:  0x80200000
+     Hash algo:    sha256
+     Hash value:   21f18d72cf2f0a7192220abb577ad25c77c26960052d779aa02bf55dbf0a6403
+   Verifying Hash Integrity ... sha256+ OK
+   ## Loading fdt from FIT Image at 88300000 ...
+   Using 'conf@microchip_icicle-kit-es-a000-microchip.dtb' configuration
+   Trying 'fdt@microchip_icicle-kit-es-a000-microchip.dtb' fdt subimage
+     Description:  Flattened Device Tree blob
+     Type:         Flat Device Tree
+     Compression:  uncompressed
+     Data Start:   0x88668d44
+     Data Size:    9760 Bytes = 9.5 KiB
+     Architecture: RISC-V
+     Load Address: 0x82200000
+     Hash algo:    sha256
+     Hash value:   5c3a9f30d41b6b8e53b47916e1f339b3a4d454006554d1f7e1f552ed62409f4b
+   Verifying Hash Integrity ... sha256+ OK
+   Loading fdt from 0x88668d48 to 0x82200000
+   Booting using the fdt blob at 0x82200000
+   Uncompressing Kernel Image
+   Loading Device Tree to 000000008fffa000, end 000000008ffff61f ... OK
+
+   Starting kernel ...
+
+   [    0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
+   [    0.000000] Linux version 5.6.16 (oe-user@oe-host) (gcc version 9.3.0 (GCC)) #1 SMP Fri Oct 9 11:49:47 UTC 2020
+   [    0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
+   [    0.000000] printk: bootconsole [sbi0] enabled
+   [    0.000000] Zone ranges:
+   [    0.000000]   DMA32    [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000]   Normal   empty
+   [    0.000000] Movable zone start for each node
+   [    0.000000] Early memory node ranges
+   [    0.000000]   node   0: [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000] Zeroed struct page in unavailable ranges: 512 pages
+   [    0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000] software IO TLB: mapped [mem 0xb9e00000-0xbde00000] (64MB)
+   [    0.000000] CPU with hartid=0 is not available
+   [    0.000000] CPU with hartid=0 is not available
+   [    0.000000] elf_hwcap is 0x112d
+   [    0.000000] percpu: Embedded 17 pages/cpu s29784 r8192 d31656 u69632
+   [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 258055
+   [    0.000000] Kernel command line: earlycon=sbi root=/dev/mmcblk0p3 rootwait console=ttyS0,115200n8 uio_pdrv_genirq.of_id=generic-uio
+   [    0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
+   [    0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
+   [    0.000000] Sorting __ex_table...
+   [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
+   [    0.000000] Memory: 941440K/1046528K available (4118K kernel code, 280K rwdata, 1687K rodata, 169K init, 273K bss, 105088K reserved, 0K cma-reserved)
+   [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
+   [    0.000000] rcu: Hierarchical RCU implementation.
+   [    0.000000] rcu: 	RCU event tracing is enabled.
+   [    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=5 to nr_cpu_ids=4.
+   [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
+   [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
+   [    0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0
+   [    0.000000] plic: mapped 53 interrupts with 4 handlers for 9 contexts.
+   [    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [1]
+   [    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns
+   [    0.000015] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns
+   [    0.008679] Console: colour dummy device 80x25
+   [    0.013112] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=10000)
+   [    0.023368] pid_max: default: 32768 minimum: 301
+   [    0.028314] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
+   [    0.035766] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
+   [    0.047099] rcu: Hierarchical SRCU implementation.
+   [    0.052813] smp: Bringing up secondary CPUs ...
+   [    0.061581] smp: Brought up 1 node, 4 CPUs
+   [    0.067069] devtmpfs: initialized
+   [    0.073621] random: get_random_u32 called from bucket_table_alloc.isra.0+0x4e/0x150 with crng_init=0
+   [    0.074409] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
+   [    0.093399] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
+   [    0.101879] NET: Registered protocol family 16
+   [    0.110336] microchip-pfsoc-clkcfg 20002000.clkcfg: Registered PFSOC core clocks
+   [    0.132717] usbcore: registered new interface driver usbfs
+   [    0.138225] usbcore: registered new interface driver hub
+   [    0.143813] usbcore: registered new device driver usb
+   [    0.148939] pps_core: LinuxPPS API ver. 1 registered
+   [    0.153929] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <[email protected]>
+   [    0.163071] PTP clock support registered
+   [    0.168521] clocksource: Switched to clocksource riscv_clocksource
+   [    0.174927] VFS: Disk quotas dquot_6.6.0
+   [    0.179016] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
+   [    0.205536] NET: Registered protocol family 2
+   [    0.210944] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
+   [    0.219393] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
+   [    0.227497] TCP bind hash table entries: 8192 (order: 5, 131072 bytes, linear)
+   [    0.235440] TCP: Hash tables configured (established 8192 bind 8192)
+   [    0.242537] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
+   [    0.249285] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
+   [    0.256690] NET: Registered protocol family 1
+   [    0.262585] workingset: timestamp_bits=62 max_order=18 bucket_order=0
+   [    0.281036] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 249)
+   [    0.288481] io scheduler mq-deadline registered
+   [    0.292983] io scheduler kyber registered
+   [    0.298895] microsemi,mss-gpio 20122000.gpio: Microsemi MSS GPIO registered 32 GPIOs
+   [    0.453723] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+   [    0.462911] printk: console [ttyS0] disabled
+   [    0.467216] 20100000.serial: ttyS0 at MMIO 0x20100000 (irq = 12, base_baud = 9375000) is a 16550A
+   [    0.476201] printk: console [ttyS0] enabled
+   [    0.476201] printk: console [ttyS0] enabled
+   [    0.484576] printk: bootconsole [sbi0] disabled
+   [    0.484576] printk: bootconsole [sbi0] disabled
+   [    0.494920] 20102000.serial: ttyS1 at MMIO 0x20102000 (irq = 13, base_baud = 9375000) is a 16550A
+   [    0.505068] 20104000.serial: ttyS2 at MMIO 0x20104000 (irq = 14, base_baud = 9375000) is a 16550A
+   [    0.533336] loop: module loaded
+   [    0.572284] Rounding down aligned max_sectors from 4294967295 to 4294967288
+   [    0.580000] db_root: cannot open: /etc/target
+   [    0.585413] libphy: Fixed MDIO Bus: probed
+   [    0.591526] libphy: MACB_mii_bus: probed
+   [    0.598060] macb 20112000.ethernet eth0: Cadence GEM rev 0x0107010c at 0x20112000 irq 17 (56:34:12:00:fc:00)
+   [    0.608352] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
+   [    0.615001] ehci-platform: EHCI generic platform driver
+   [    0.620446] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
+   [    0.626632] ohci-platform: OHCI generic platform driver
+   [    0.632326] usbcore: registered new interface driver cdc_acm
+   [    0.637996] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
+   [    0.646459] i2c /dev entries driver
+   [    0.650852] microsemi-mss-i2c 2010b000.i2c: Microsemi I2C Probe Complete
+   [    0.658010] sdhci: Secure Digital Host Controller Interface driver
+   [    0.664326] sdhci: Copyright(c) Pierre Ossman
+   [    0.668754] sdhci-pltfm: SDHCI platform and OF driver helper
+   [    0.706845] mmc0: SDHCI controller on 20008000.sdhc [20008000.sdhc] using ADMA 64-bit
+   [    0.715052] usbcore: registered new interface driver usbhid
+   [    0.720722] usbhid: USB HID core driver
+   [    0.725174] pac193x 0-0010: Chip revision: 0x03
+   [    0.733339] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 0 active
+   [    0.740127] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 1 active
+   [    0.746881] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 2 active
+   [    0.753686] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 3 active
+   [    0.760495] pac193x 0-0010: :pac193x_prep_iio_channels: Active chip channels: 25
+   [    0.778006] NET: Registered protocol family 10
+   [    0.784929] Segment Routing with IPv6
+   [    0.788875] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
+   [    0.795743] NET: Registered protocol family 17
+   [    0.801191] hctosys: unable to open rtc device (rtc0)
+   [    0.807774] Waiting for root device /dev/mmcblk0p3...
+   [    0.858506] mmc0: mmc_select_hs200 failed, error -74
+   [    0.865764] mmc0: new MMC card at address 0001
+   [    0.872564] mmcblk0: mmc0:0001 DG4008 7.28 GiB
+   [    0.878777] mmcblk0boot0: mmc0:0001 DG4008 partition 1 4.00 MiB
+   [    0.886182] mmcblk0boot1: mmc0:0001 DG4008 partition 2 4.00 MiB
+   [    0.892633] mmcblk0rpmb: mmc0:0001 DG4008 partition 3 4.00 MiB, chardev (247:0)
+   [    0.919029] GPT:Primary header thinks Alt. header is not at the end of the disk.
+   [    0.926448] GPT:2255841 != 15273599
+   [    0.930019] GPT:Alternate GPT header not at the end of the disk.
+   [    0.936029] GPT:2255841 != 15273599
+   [    0.939583] GPT: Use GNU Parted to correct GPT errors.
+   [    0.944800]  mmcblk0: p1 p2 p3
+   [    0.966696] EXT4-fs (mmcblk0p3): INFO: recovery required on readonly filesystem
+   [    0.974105] EXT4-fs (mmcblk0p3): write access will be enabled during recovery
+   [    1.052362] random: fast init done
+   [    1.057961] EXT4-fs (mmcblk0p3): recovery complete
+   [    1.065734] EXT4-fs (mmcblk0p3): mounted filesystem with ordered data mode. Opts: (null)
+   [    1.074002] VFS: Mounted root (ext4 filesystem) readonly on device 179:3.
+   [    1.081654] Freeing unused kernel memory: 168K
+   [    1.086108] This architecture does not have kernel memory protection.
+   [    1.092629] Run /sbin/init as init process
+   [    1.702217] systemd[1]: System time before build time, advancing clock.
+   [    1.754192] systemd[1]: systemd 244.3+ running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR -SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN -PCRE2 default-hierarchy=hybrid)
+   [    1.776361] systemd[1]: Detected architecture riscv64.
+
+   Welcome to OpenEmbedded nodistro.0!
+
+   [    1.829651] systemd[1]: Set hostname to <icicle-kit-es>.
+   [    2.648597] random: systemd: uninitialized urandom read (16 bytes read)
+   [    2.657485] systemd[1]: Created slice system-getty.slice.
+   [  OK  ] Created slice system-getty.slice.
+   [    2.698779] random: systemd: uninitialized urandom read (16 bytes read)
+   [    2.706317] systemd[1]: Created slice system-serial\x2dgetty.slice.
+   [  OK  ] Created slice system-serial\x2dgetty.slice.
+   [    2.748716] random: systemd: uninitialized urandom read (16 bytes read)
+   [    2.756098] systemd[1]: Created slice User and Session Slice.
+   [  OK  ] Created slice User and Session Slice.
+   [    2.789065] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
+   [  OK  ] Started Dispatch Password …ts to Console Directory Watch.
+   [    2.828974] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
+   [  OK  ] Started Forward Password R…uests to Wall Directory Watch.
+   [    2.869009] systemd[1]: Reached target Paths.
+   [  OK  ] Reached target Paths.
+   [    2.898808] systemd[1]: Reached target Remote File Systems.
+   [  OK  ] Reached target Remote File Systems.
+   [    2.938771] systemd[1]: Reached target Slices.
+   [  OK  ] Reached target Slices.
+   [    2.968754] systemd[1]: Reached target Swap.
+   [  OK  ] Reached target Swap.
+   [    2.999283] systemd[1]: Listening on initctl Compatibility Named Pipe.
+   [  OK  ] Listening on initctl Compatibility Named Pipe.
+   [    3.060458] systemd[1]: Condition check resulted in Journal Audit Socket being skipped.
+   [    3.069826] systemd[1]: Listening on Journal Socket (/dev/log).
+   [  OK  ] Listening on Journal Socket (/dev/log).
+   [    3.109601] systemd[1]: Listening on Journal Socket.
+   [  OK  ] Listening on Journal Socket.
+   [    3.149868] systemd[1]: Listening on Network Service Netlink Socket.
+   [  OK  ] Listening on Network Service Netlink Socket.
+   [    3.189419] systemd[1]: Listening on udev Control Socket.
+   [  OK  ] Listening on udev Control Socket.
+   [    3.229179] systemd[1]: Listening on udev Kernel Socket.
+   [  OK  ] Listening on udev Kernel Socket.
+   [    3.269520] systemd[1]: Condition check resulted in Huge Pages File System being skipped.
+   [    3.278477] systemd[1]: Condition check resulted in POSIX Message Queue File System being skipped.
+   [    3.288200] systemd[1]: Condition check resulted in Kernel Debug File System being skipped.
+   [    3.302570] systemd[1]: Mounting Temporary Directory (/tmp)...
+            Mounting Temporary Directory (/tmp)...
+   [    3.339226] systemd[1]: Condition check resulted in Create list of static device nodes for the current kernel being skipped.
+   [    3.355883] systemd[1]: Starting File System Check on Root Device...
+            Starting File System Check on Root Device...
+   [    3.407220] systemd[1]: Starting Journal Service...
+            Starting Journal Service...
+   [    3.422441] systemd[1]: Condition check resulted in Load Kernel Modules being skipped.
+   [    3.431770] systemd[1]: Condition check resulted in FUSE Control File System being skipped.
+   [    3.446415] systemd[1]: Mounting Kernel Configuration File System...
+            Mounting Kernel Configuration File System...
+   [    3.458983] systemd[1]: Starting Apply Kernel Variables...
+            Starting Apply Kernel Variables...
+   [    3.471368] systemd[1]: Starting udev Coldplug all Devices...
+            Starting udev Coldplug all Devices...
+   [    3.491071] systemd[1]: Mounted Temporary Directory (/tmp).
+   [  OK      3.498114] systemd[1]: Mounted Kernel Configuration File System.
+   0m] Mounted Temporary Directory (/tmp).
+   [  OK  ] Mounted Kernel Configuration File System.
+   [    3.550853] systemd[1]: Started Apply Kernel Variables.
+   [  OK      3.557535] systemd[1]: Started Journal Service.
+   0m] Started Apply Kernel Variables.
+   [  OK  ] Started Journal Service.
+   [  OK  ] Started udev Coldplug all Devices.
+   [  OK  ] Started File System Check on Root Device.
+            Starting Remount Root and Kernel File Systems...
+   [    8.133469] EXT4-fs (mmcblk0p3): re-mounted. Opts: (null)
+   [  OK  ] Started Remount Root and Kernel File Systems.
+            Starting Flush Journal to Persistent Storage...
+   [    8.215327] systemd-journald[77]: Received client request to flush runtime journal.
+            Starting Create Static Device Nodes in /dev...
+   [  OK  ] Started Flush Journal to Persistent Storage.
+   [  OK  ] Started Create Static Device Nodes in /dev.
+   [  OK  ] Reached target Local File Systems (Pre).
+            Mounting /var/volatile...
+            Starting udev Kernel Device Manager...
+   [  OK  ] Mounted /var/volatile.
+            Starting Load/Save Random Seed...
+   [  OK  ] Reached target Local File Systems.
+            Starting Create Volatile Files and Directories...
+   [  OK  ] Started udev Kernel Device Manager.
+   [  OK  ] Started Create Volatile Files and Directories.
+            Starting Network Time Synchronization...
+            Starting Update UTMP about System Boot/Shutdown...
+   [  OK  ] Started Update UTMP about System Boot/Shutdown.
+   [  OK  ] Started Network Time Synchronization.
+   [   11.618575] random: crng init done
+   [   11.622007] random: 7 urandom warning(s) missed due to ratelimiting
+   [  OK  ] Started Load/Save Random Seed.
+   [  OK  ] Reached target System Initialization.
+   [  OK  ] Started Daily Cleanup of Temporary Directories.
+   [  OK  ] Reached target System Time Set.
+   [  OK  ] Reached target System Time Synchronized.
+   [  OK  ] Reached target Timers.
+   [  OK  ] Listening on D-Bus System Message Bus Socket.
+   [  OK  ] Listening on dropbear.socket.
+   [  OK  ] Reached target Sockets.
+   [  OK  ] Reached target Basic System.
+   [  OK  ] Started D-Bus System Message Bus.
+            Starting IPv6 Packet Filtering Framework...
+            Starting IPv4 Packet Filtering Framework...
+            Starting Login Service...
+   [  OK  ] Started IPv6 Packet Filtering Framework.
+   [  OK  ] Started IPv4 Packet Filtering Framework.
+   [  OK  ] Reached target Network (Pre).
+            Starting Network Service...
+   [  OK  ] Started Login Service.
+   [   12.602455] macb 20112000.ethernet eth0: PHY [20112000.ethernet-ffffffff:09] driver [Vitesse VSC8662] (irq=POLL)
+   [   12.612795] macb 20112000.ethernet eth0: configuring for phy/sgmii link mode
+   [   12.622153] pps pps0: new PPS source ptp0
+   [  OK     12.626725] macb 20112000.ethernet: gem-ptp-timer ptp clock registered.
+   0m] Started Network Service.
+            Starting Network Name Resolution...
+   [  OK  ] Started Network Name Resolution.
+   [  OK  ] Reached target Network.
+   [  OK  ] Reached target Host and Network Name Lookups.
+   [  OK  ] Started Collectd.
+   [  OK  ] Started Collectd.
+            Starting Permit User Sessions...
+   [  OK  ] Started Permit User Sessions.
+   [  OK  ] Started Getty on tty1.
+   [  OK  ] Started Serial Getty on ttyS0.
+   [  OK  ] Reached target Login Prompts.
+   [  OK  ] Reached target Multi-User System.
+            Starting Update UTMP about System Runlevel Changes...
+   [  OK  ] Started Update UTMP about System Runlevel Changes.
+
+   OpenEmbedded nodistro.0 icicle-kit-es ttyS0
+
+   icicle-kit-es login: [   15.795564] macb 20112000.ethernet eth0: Link is Up - 1Gbps/Full - flow control tx
+   [   15.803306] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
+
+   icicle-kit-es login: root
+   root@icicle-kit-es:~#
diff --git a/doc/board/microchip/mpfs_design_hss.rst b/doc/board/microchip/mpfs_design_hss.rst
new file mode 100644
index 00000000000..d4100470758
--- /dev/null
+++ b/doc/board/microchip/mpfs_design_hss.rst
@@ -0,0 +1,37 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+FPGA design with HSS programming file
+'''''''''''''''''''''''''''''''''''''
+
+https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/reference-designs-fpga-and-development-kits/updating-linux-in-mpfs-kit.md
+
+The HSS firmware runs from the PolarFire SoC eNVM on reset.
+
+Creating the HSS payload - Microchip boot-flow
+''''''''''''''''''''''''''''''''''''''''''''''
+
+1. You will be creating a payload from `u-boot-dtb.bin`.
+   Copy this file to the HSS/tools/hss-payload-generator/test directory.
+2. Go to hss-payload-generator source directory.
+
+.. code-block:: none
+
+   cd hart-software-services/tools/hss-payload-generator
+
+3. Edit test/uboot.yaml file for hart entry points and correct name of the binary file.
+
+	hart-entry-points: {u54_1: '0x80200000', u54_2: '0x80200000', u54_3: '0x80200000', u54_4: '0x80200000'}
+
+	payloads:
+	test/u-boot-dtb.bin: {exec-addr: '0x80200000', owner-hart: u54_1, secondary-hart: u54_2, secondary-hart: u54_3, secondary-hart: u54_4, priv-mode: prv_s}
+
+4. Generate payload
+
+.. code-block:: none
+
+   ./hss-payload-generator -c test/uboot.yaml payload.bin
+
+Once the payload binary is generated, it should be copied to the eMMC.
+
+Please refer to HSS documenation to build the HSS firmware for payload.
+(Note: HSS git repo is at https://github.com/polarfire-soc/hart-software-services/blob/master/tools/hss-payload-generator/README.md)
+\ No newline at end of file
diff --git a/doc/board/microchip/mpfs_icicle.rst b/doc/board/microchip/mpfs_icicle.rst
index 1464e536e94..5af7125bde0 100644
--- a/doc/board/microchip/mpfs_icicle.rst
+++ b/doc/board/microchip/mpfs_icicle.rst
@@ -22,33 +22,7 @@ The support for following drivers are already enabled:
 4. Cadence MMC Driver for eMMC/SD support.
 5. Microchip I2C Driver.
 
-Booting from eMMC using HSS
----------------------------
-
-Building U-Boot
-~~~~~~~~~~~~~~~
-
-1. Add the RISC-V toolchain to your PATH.
-2. Setup ARCH & cross compilation environment variable:
-
-.. code-block:: none
-
-   export CROSS_COMPILE=<riscv64 toolchain prefix>
-
-3. make microchip_mpfs_icicle_defconfig
-4. make
-
-Flashing
-~~~~~~~~
-
-The current U-Boot port is supported in S-mode only and loaded from DRAM.
-
-A prior stage M-mode firmware/bootloader (e.g HSS with OpenSBI) is required to
-boot the u-boot.bin in S-mode.
-
-Currently, the u-boot.bin is used as a payload of the HSS firmware (Microchip
-boot-flow) and OpenSBI generic platform fw_payload.bin (with u-boot.bin embedded)
-as HSS payload (Custom boot-flow)
+.. include:: mpfs_build_boot.rst
 
 Microchip boot-flow
 ~~~~~~~~~~~~~~~~~~~
@@ -64,55 +38,21 @@ Build the HSS (Hart Software Services) - Microchip boot-flow
 
 .. code-block:: none
 
-   make BOARD=icicle-kit-es config
+   make BOARD=mpfs-icicle-kit-es config
 
 Alternatively, copy the default config for Microchip boot-flow.
 
 .. code-block:: none
 
-   cp boards/icicle-kit-es/def_config .config
+   cp boards/mpfs-icicle-kit-es/def_config .config
 
-2. make BOARD=icicle-kit-es
+2. make BOARD=mpfs-icicle-kit-es
 3. In the Default subdirectory, the standard build will create hss.elf and
    various binary formats (hss.hex and hss.bin).
 
 The FPGA design will use the hss.hex or hss.bin.
 
-FPGA design with HSS programming file
-'''''''''''''''''''''''''''''''''''''
-
-https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/boards/mpfs-icicle-kit-es/updating-icicle-kit/updating-icicle-kit-design-and-linux.md
-
-The HSS firmware runs from the PolarFire SoC eNVM on reset.
-
-Creating the HSS payload - Microchip boot-flow
-''''''''''''''''''''''''''''''''''''''''''''''
-
-1. You will be creating a payload from `u-boot-dtb.bin`.
-   Copy this file to the HSS/tools/hss-payload-generator/test directory.
-2. Go to hss-payload-generator source directory.
-
-.. code-block:: none
-
-   cd hart-software-services/tools/hss-payload-generator
-
-3. Edit test/uboot.yaml file for hart entry points and correct name of the binary file.
-
-	hart-entry-points: {u54_1: '0x80200000', u54_2: '0x80200000', u54_3: '0x80200000', u54_4: '0x80200000'}
-
-	payloads:
-	test/u-boot-dtb.bin: {exec-addr: '0x80200000', owner-hart: u54_1, secondary-hart: u54_2, secondary-hart: u54_3, secondary-hart: u54_4, priv-mode: prv_s}
-
-4. Generate payload
-
-.. code-block:: none
-
-   ./hss-payload-generator -c test/uboot.yaml payload.bin
-
-Once the payload binary is generated, it should be copied to the eMMC.
-
-Please refer to HSS documenation to build the HSS firmware for payload.
-(Note: HSS git repo is at https://github.com/polarfire-soc/hart-software-services/blob/master/tools/hss-payload-generator/README.md)
+.. include:: mpfs_design_hss.rst
 
 Custom boot-flow
 ~~~~~~~~~~~~~~~~
@@ -134,7 +74,7 @@ Build OpenSBI
 .. code-block:: none
 
    make PLATFORM=generic FW_PAYLOAD_PATH=<u-boot-directory>/u-boot.bin
-   FW_FDT_PATH=<u-boot-directory>/arch/riscv/dts/mpfs-icicle-kit-.dtb
+   FW_FDT_PATH=<u-boot-directory>/dts/upstream/src/riscv/microchip/mpfs-icicle-kit-.dtb
 
 3. Output "fw_payload.bin" file available at
    "<opensbi-directory>/build/platform/generic/firmware/fw_payload.bin"
@@ -148,681 +88,18 @@ Build the HSS (Hart Software Services)- Custom boot-flow
 
 .. code-block:: none
 
-   make BOARD=icicle-kit-es config
+   make BOARD=mpfs-icicle-kit-es config
 
 Alternatively, copy the default custom config for Custom boot-flow.
 
 .. code-block:: none
 
-   cp boards/icicle-kit-es/def_config_custom .config
+   cp boards/mpfs-icicle-kit-es/def_config_custom .config
 
-2. make BOARD=icicle-kit-es
+2. make BOARD=mpfs-icicle-kit-es
 3. In the Default subdirectory, the standard build will create hss.elf and
    various binary formats (hss.hex and hss.bin).
 
 The FPGA design will use the hss.hex or hss.bin.
 
-Creating the HSS payload - Custom boot-flow
-'''''''''''''''''''''''''''''''''''''''''''
-
-1. You will be creating a payload from `fw_payload.bin`.
-   Copy this file to the HSS/tools/hss-payload-generator/test directory.
-2. Go to hss-payload-generator source directory.
-
-.. code-block:: none
-
-   cd hart-software-services/tools/hss-payload-generator
-
-3. Edit test/uboot.yaml file for hart entry points and correct name of the binary file.
-
-	hart-entry-points: {u54_1: '0x80000000', u54_2: '0x80000000', u54_3: '0x80000000', u54_4: '0x80000000'}
-
-	payloads:
-	test/fw_payload.bin: {exec-addr: '0x80000000', owner-hart: u54_1, secondary-hart: u54_2, secondary-hart: u54_3, secondary-hart: u54_4, priv-mode: prv_m}
-
-4. Generate payload
-
-.. code-block:: none
-
-   ./hss-payload-generator -c test/uboot.yaml payload.bin
-
-Once the payload binary is generated, it should be copied to the eMMC.
-
-Please refer to HSS documenation to build the HSS firmware for payload.
-(Note: HSS git repo is at https://github.com/polarfire-soc/hart-software-services/blob/master/tools/hss-payload-generator/README.md
-and also refer the HSS payload generator at https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/software-development/hss-payloads.md)
-
-eMMC
-~~~~
-
-Program eMMC with payload binary is explained in the PolarFire SoC documentation.
-(Note: PolarFire SoC Documentation git repo is at https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/boards/mpfs-icicle-kit-es/updating-icicle-kit/updating-icicle-kit-design-and-linux.md#eMMC)
-
-Once the payload image is copied to the eMMC, press CTRL+C in the HSS command
-line interface, then type 'boot' and enter to boot the newly copied image.
-
-.. code-block:: none
-
-    sudo dd if=<payload_binary> of=/dev/sdX bs=512
-
-GUID type
-~~~~~~~~~
-
-The HSS always picks up HSS payload from a GPT partition with
-GUID type "21686148-6449-6E6F-744E-656564454649" or sector '0' of the eMMC if no
-GPT partition.
-
-Booting
-~~~~~~~
-
-You should see the U-Boot prompt on UART1.
-(Note: UART0 is reserved for HSS)
-
-Sample boot log from MPFS Icicle Kit
-''''''''''''''''''''''''''''''''''''
-
-.. code-block:: none
-
-   U-Boot 2021.01-00314-g7303332537-dirty (Jan 14 2021 - 10:09:43 +0530)
-
-   CPU:   rv64imafdc
-   Model: Microchip MPFS Icicle Kit
-   DRAM:  1 GiB
-   MMC:   sdhc@20008000: 0
-   In:    serial@20100000
-   Out:   serial@20100000
-   Err:   serial@20100000
-   Net:   eth0: ethernet@20112000
-   Hit any key to stop autoboot:  0
-
-Now you can configure your networking, tftp server and use tftp boot method to
-load uImage (with initramfs).
-
-.. code-block:: none
-
-   RISC-V # setenv kernel_addr_r 0x80200000
-   RISC-V # setenv fdt_addr_r 0x82200000
-
-   RISC-V # setenv ipaddr 192.168.1.5
-   RISC-V # setenv netmask 255.255.255.0
-   RISC-V # setenv serverip 192.168.1.3
-   RISC-V # setenv gateway 192.168.1.1
-
-   RISC-V # tftpboot ${kernel_addr_r} uImage
-   ethernet@20112000: PHY present at 9
-   ethernet@20112000: Starting autonegotiation...
-   ethernet@20112000: Autonegotiation complete
-   ethernet@20112000: link up, 1000Mbps full-duplex (lpa: 0x7800)
-   Using ethernet@20112000 device
-   TFTP from server 192.168.1.3; our IP address is 192.168.1.5
-   Filename 'uImage'.
-   Load address: 0x80200000
-   Loading: #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    #################################################################
-	    ############
-	    6.4 MiB/s
-   done
-   Bytes transferred = 14482480 (dcfc30 hex)
-
-   RISC-V # tftpboot ${fdt_addr_r} mpfs-icicle-kit.dtb
-   ethernet@20112000: PHY present at 9
-   ethernet@20112000: Starting autonegotiation...
-   ethernet@20112000: Autonegotiation complete
-   ethernet@20112000: link up, 1000Mbps full-duplex (lpa: 0x7800)
-   Using ethernet@20112000 device
-   TFTP from server 192.168.1.3; our IP address is 192.168.1.5
-   Filename 'mpfs-icicle-kit.dtb'.
-   Load address: 0x82200000
-   Loading: #
-			2.5 MiB/s
-   done
-   Bytes transferred = 10282 (282a hex)
-
-   RISC-V # bootm ${kernel_addr_r} - ${fdt_addr_r}
-   ## Booting kernel from Legacy Image at 80200000 ...
-		Image Name:   Linux
-		Image Type:   RISC-V Linux Kernel Image (uncompressed)
-		Data Size:    14482416 Bytes = 13.8 MiB
-		Load Address: 80200000
-		Entry Point:  80200000
-		Verifying Checksum ... OK
-   ## Flattened Device Tree blob at 82200000
-		Booting using the fdt blob at 0x82200000
-		Loading Kernel Image
-		Using Device Tree in place at 000000008fffa000, end 000000008ffff829 ... OK
-
-   Starting kernel ...
-
-   [    0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
-   [    0.000000] Linux version 5.6.17 (padmarao@padmarao-VirtualBox) (gcc version 7.2.0 (GCC)) #2 SMP Tue Jun 16 21:27:50 IST 2020
-   [    0.000000] initrd not found or empty - disabling initrd
-   [    0.000000] Zone ranges:
-   [    0.000000]   DMA32    [mem 0x0000000080200000-0x00000000bfffffff]
-   [    0.000000]   Normal   empty
-   [    0.000000] Movable zone start for each node
-   [    0.000000] Early memory node ranges
-   [    0.000000]   node   0: [mem 0x0000000080200000-0x00000000bfffffff]
-   [    0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x00000000bfffffff]
-   [    0.000000] software IO TLB: mapped [mem 0xbb1f5000-0xbf1f5000] (64MB)
-   [    0.000000] elf_hwcap is 0x112d
-   [    0.000000] percpu: Embedded 14 pages/cpu s24856 r0 d32488 u57344
-   [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 258055
-   [    0.000000] Kernel command line: console=ttyS0,115200n8
-   [    0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
-   [    0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
-   [    0.000000] Sorting __ex_table...
-   [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
-   [    0.000000] Memory: 950308K/1046528K available (3289K kernel code, 212K rwdata, 900K rodata, 9476K init, 250K bss, 96220K reserved, 0K cma-reserved)
-   [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
-   [    0.000000] rcu: Hierarchical RCU implementation.
-   [    0.000000] rcu: 	RCU event tracing is enabled.
-   [    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
-   [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
-   [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
-   [    0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0
-   [    0.000000] plic: mapped 186 interrupts with 4 handlers for 9 contexts.
-   [    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [1]
-   [    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns
-   [    0.000015] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns
-   [    0.000311] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=10000)
-   [    0.000349] pid_max: default: 32768 minimum: 301
-   [    0.000846] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
-   [    0.000964] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
-   [    0.005630] rcu: Hierarchical SRCU implementation.
-   [    0.006901] smp: Bringing up secondary CPUs ...
-   [    0.012545] smp: Brought up 1 node, 4 CPUs
-   [    0.014431] devtmpfs: initialized
-   [    0.020526] random: get_random_bytes called from setup_net+0x36/0x192 with crng_init=0
-   [    0.020928] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
-   [    0.020999] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
-   [    0.022768] NET: Registered protocol family 16
-   [    0.035478] microchip-pfsoc-clkcfg 20002000.clkcfg: Registered PFSOC core clocks
-   [    0.048429] SCSI subsystem initialized
-   [    0.049694] pps_core: LinuxPPS API ver. 1 registered
-   [    0.049719] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <[email protected]>
-   [    0.049780] PTP clock support registered
-   [    0.051781] clocksource: Switched to clocksource riscv_clocksource
-   [    0.055326] NET: Registered protocol family 2
-   [    0.056922] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
-   [    0.057053] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
-   [    0.057648] TCP bind hash table entries: 8192 (order: 5, 131072 bytes, linear)
-   [    0.058579] TCP: Hash tables configured (established 8192 bind 8192)
-   [    0.059648] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
-   [    0.059837] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
-   [    0.060707] NET: Registered protocol family 1
-   [    0.266229] workingset: timestamp_bits=62 max_order=18 bucket_order=0
-   [    0.287107] io scheduler mq-deadline registered
-   [    0.287140] io scheduler kyber registered
-   [    0.429601] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
-   [    0.433979] printk: console [ttyS0] disabled
-   [    0.434154] 20000000.serial: ttyS0 at MMIO 0x20000000 (irq = 18, base_baud = 9375000) is a 16550A
-   [    0.928039] printk: console [ttyS0] enabled
-   [    0.939804] libphy: Fixed MDIO Bus: probed
-   [    0.948702] libphy: MACB_mii_bus: probed
-   [    0.993698] macb 20112000.ethernet eth0: Cadence GEM rev 0x0107010c at 0x20112000 irq 21 (56:34:12:00:fc:00)
-   [    1.006751] mousedev: PS/2 mouse device common for all mice
-   [    1.013803] i2c /dev entries driver
-   [    1.019451] sdhci: Secure Digital Host Controller Interface driver
-   [    1.027242] sdhci: Copyright(c) Pierre Ossman
-   [    1.032731] sdhci-pltfm: SDHCI platform and OF driver helper
-   [    1.091826] mmc0: SDHCI controller on 20008000.sdhc [20008000.sdhc] using ADMA 64-bit
-   [    1.102738] NET: Registered protocol family 17
-   [    1.170326] Freeing unused kernel memory: 9476K
-   [    1.176067] This architecture does not have kernel memory protection.
-   [    1.184157] Run /init as init process
-   Starting logging: OK
-   Starting mdev...
-   /etc/init.d/S10mdev: line 21: can't create /proc/sys/kernel/hotplug: nonexiste[    1.331981] mmc0: mmc_select_hs200 failed, error -74
-   nt directory
-   [    1.355011] mmc0: new MMC card at address 0001
-   [    1.363981] mmcblk0: mmc0:0001 DG4008 7.28 GiB
-   [    1.372248] mmcblk0boot0: mmc0:0001 DG4008 partition 1 4.00 MiB
-   [    1.382292] mmcblk0boot1: mmc0:0001 DG4008 partition 2 4.00 MiB
-   [    1.390265] mmcblk0rpmb: mmc0:0001 DG4008 partition 3 4.00 MiB, chardev (251:0)
-   [    1.425234] GPT:Primary header thinks Alt. header is not at the end of the disk.
-   [    1.434656] GPT:2255809 != 15273599
-   [    1.439038] GPT:Alternate GPT header not at the end of the disk.
-   [    1.446671] GPT:2255809 != 15273599
-   [    1.451048] GPT: Use GNU Parted to correct GPT errors.
-   [    1.457755]  mmcblk0: p1 p2 p3
-   sort: /sys/devices/platform/Fixed: No such file or directory
-   modprobe: can't change directory to '/lib/modules': No such file or directory
-   Initializing random number generator... [    2.830198] random: dd: uninitialized urandom read (512 bytes read)
-   done.
-   Starting network...
-   [    3.061867] macb 20112000.ethernet eth0: PHY [20112000.ethernet-ffffffff:09] driver [Vitesse VSC8662] (irq=POLL)
-   [    3.074674] macb 20112000.ethernet eth0: configuring for phy/sgmii link mode
-   [    3.084263] pps pps0: new PPS source ptp0
-   [    3.089710] macb 20112000.ethernet: gem-ptp-timer ptp clock registered.
-   udhcpc (v1.24.2) started
-   Sending discover...
-   Sending discover...
-   [    6.380169] macb 20112000.ethernet eth0: Link is Up - 1Gbps/Full - flow control tx
-   Sending discover...
-   Sending select for 192.168.1.2...
-   Lease of 192.168.1.2 obtained, lease time 86400
-   deleting routers
-   adding dns 192.168.1.1
-   Starting dropbear sshd: [   11.385619] random: dropbear: uninitialized urandom read (32 bytes read)
-   OK
-
-   Welcome to Buildroot
-   buildroot login: root
-   Password:
-   #
-
-Booting U-Boot and Linux from eMMC
-----------------------------------
-
-FPGA design with HSS programming file and Linux Image
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/boards/mpfs-icicle-kit-es/updating-icicle-kit/updating-icicle-kit-design-and-linux.md
-
-The HSS firmware runs from the PolarFire SoC eNVM on reset.
-
-eMMC
-~~~~
-
-Program eMMC with payload binary and Linux image is explained in the
-PolarFire SoC documentation.
-The payload binary should be copied to partition 2 of the eMMC.
-
-(Note: PolarFire SoC Documentation git repo is at https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/boards/mpfs-icicle-kit-es/updating-icicle-kit/updating-icicle-kit-design-and-linux.md#eMMC)
-
-Once the Linux image and payload binary is copied to the eMMC, press CTRL+C
-in the HSS command line interface, then type 'boot' and enter to boot the newly
-copied payload and Linux image.
-
-.. code-block:: none
-
-    zcat <linux-image>.wic.gz | sudo dd of=/dev/sdX bs=4096 iflag=fullblock oflag=direct conv=fsync status=progress
-
-    sudo dd if=<payload_binary> of=/dev/sdX2 bs=512
-
-You should see the U-Boot prompt on UART1.
-(Note: UART0 is reserved for HSS)
-
-GUID type
-~~~~~~~~~
-
-The HSS always picks up the HSS payload from a GPT partition with
-GUID type "21686148-6449-6E6F-744E-656564454649" or sector '0' of the eMMC if no
-GPT partition.
-
-Sample boot log from MPFS Icicle Kit
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-.. code-block:: none
-
-   U-Boot 2021.01-00314-g7303332537-dirty (Jan 14 2021 - 10:09:43 +0530)
-
-   CPU:   rv64imafdc
-   Model: Microchip MPFS Icicle Kit
-   DRAM:  1 GiB
-   MMC:   sdhc@20008000: 0
-   In:    serial@20100000
-   Out:   serial@20100000
-   Err:   serial@20100000
-   Net:   eth0: ethernet@20112000
-   Hit any key to stop autoboot:  0
-
-   RISC-V # mmc info
-   Device: sdhc@20008000
-   Manufacturer ID: 45
-   OEM: 100
-   Name: DG400
-   Bus Speed: 52000000
-   Mode: MMC High Speed (52MHz)
-   Rd Block Len: 512
-   MMC version 5.1
-   High Capacity: Yes
-   Capacity: 7.3 GiB
-   Bus Width: 4-bit
-   Erase Group Size: 512 KiB
-   HC WP Group Size: 8 MiB
-   User Capacity: 7.3 GiB WRREL
-   Boot Capacity: 4 MiB ENH
-   RPMB Capacity: 4 MiB ENH
-
-   RISC-V # mmc part
-   Partition Map for MMC device 0  --   Partition Type: EFI
-
-   Part	Start LBA	End LBA		Name
-		Attributes
-		Type GUID
-		Partition GUID
-	1	0x00002000	0x0000b031	"boot"
-		attrs:	0x0000000000000004
-		type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
-		guid:	99ff6a94-f2e7-44dd-a7df-f3a2da106ef9
-	2	0x0000b032	0x0000f031	"primary"
-		attrs:	0x0000000000000000
-		type:	21686148-6449-6e6f-744e-656564454649
-		guid:	12006052-e64b-4423-beb0-b956ea00f1ba
-	3	0x00010000	0x00226b9f	"root"
-		attrs:	0x0000000000000000
-		type:	0fc63daf-8483-4772-8e79-3d69d8477de4
-		guid:	dd2c5619-2272-4c3c-8dc2-e21942e17ce6
-
-   RISC-V # load mmc 0 ${ramdisk_addr_r} fitimage
-   RISC-V # bootm ${ramdisk_addr_r}
-   ## Loading kernel from FIT Image at 88300000 ...
-   Using 'conf@microchip_icicle-kit-es-a000-microchip.dtb' configuration
-   Trying 'kernel@1' kernel subimage
-     Description:  Linux kernel
-     Type:         Kernel Image
-     Compression:  gzip compressed
-     Data Start:   0x883000fc
-     Data Size:    3574555 Bytes = 3.4 MiB
-     Architecture: RISC-V
-     OS:           Linux
-     Load Address: 0x80200000
-     Entry Point:  0x80200000
-     Hash algo:    sha256
-     Hash value:   21f18d72cf2f0a7192220abb577ad25c77c26960052d779aa02bf55dbf0a6403
-   Verifying Hash Integrity ... sha256+ OK
-   ## Loading fdt from FIT Image at 88300000 ...
-   Using 'conf@microchip_icicle-kit-es-a000-microchip.dtb' configuration
-   Trying 'fdt@microchip_icicle-kit-es-a000-microchip.dtb' fdt subimage
-     Description:  Flattened Device Tree blob
-     Type:         Flat Device Tree
-     Compression:  uncompressed
-     Data Start:   0x88668d44
-     Data Size:    9760 Bytes = 9.5 KiB
-     Architecture: RISC-V
-     Load Address: 0x82200000
-     Hash algo:    sha256
-     Hash value:   5c3a9f30d41b6b8e53b47916e1f339b3a4d454006554d1f7e1f552ed62409f4b
-   Verifying Hash Integrity ... sha256+ OK
-   Loading fdt from 0x88668d48 to 0x82200000
-   Booting using the fdt blob at 0x82200000
-   Uncompressing Kernel Image
-   Loading Device Tree to 000000008fffa000, end 000000008ffff61f ... OK
-
-   Starting kernel ...
-
-   [    0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
-   [    0.000000] Linux version 5.6.16 (oe-user@oe-host) (gcc version 9.3.0 (GCC)) #1 SMP Fri Oct 9 11:49:47 UTC 2020
-   [    0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
-   [    0.000000] printk: bootconsole [sbi0] enabled
-   [    0.000000] Zone ranges:
-   [    0.000000]   DMA32    [mem 0x0000000080200000-0x00000000bfffffff]
-   [    0.000000]   Normal   empty
-   [    0.000000] Movable zone start for each node
-   [    0.000000] Early memory node ranges
-   [    0.000000]   node   0: [mem 0x0000000080200000-0x00000000bfffffff]
-   [    0.000000] Zeroed struct page in unavailable ranges: 512 pages
-   [    0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x00000000bfffffff]
-   [    0.000000] software IO TLB: mapped [mem 0xb9e00000-0xbde00000] (64MB)
-   [    0.000000] CPU with hartid=0 is not available
-   [    0.000000] CPU with hartid=0 is not available
-   [    0.000000] elf_hwcap is 0x112d
-   [    0.000000] percpu: Embedded 17 pages/cpu s29784 r8192 d31656 u69632
-   [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 258055
-   [    0.000000] Kernel command line: earlycon=sbi root=/dev/mmcblk0p3 rootwait console=ttyS0,115200n8 uio_pdrv_genirq.of_id=generic-uio
-   [    0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
-   [    0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
-   [    0.000000] Sorting __ex_table...
-   [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
-   [    0.000000] Memory: 941440K/1046528K available (4118K kernel code, 280K rwdata, 1687K rodata, 169K init, 273K bss, 105088K reserved, 0K cma-reserved)
-   [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
-   [    0.000000] rcu: Hierarchical RCU implementation.
-   [    0.000000] rcu: 	RCU event tracing is enabled.
-   [    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=5 to nr_cpu_ids=4.
-   [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
-   [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
-   [    0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0
-   [    0.000000] plic: mapped 53 interrupts with 4 handlers for 9 contexts.
-   [    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [1]
-   [    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns
-   [    0.000015] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns
-   [    0.008679] Console: colour dummy device 80x25
-   [    0.013112] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=10000)
-   [    0.023368] pid_max: default: 32768 minimum: 301
-   [    0.028314] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
-   [    0.035766] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
-   [    0.047099] rcu: Hierarchical SRCU implementation.
-   [    0.052813] smp: Bringing up secondary CPUs ...
-   [    0.061581] smp: Brought up 1 node, 4 CPUs
-   [    0.067069] devtmpfs: initialized
-   [    0.073621] random: get_random_u32 called from bucket_table_alloc.isra.0+0x4e/0x150 with crng_init=0
-   [    0.074409] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
-   [    0.093399] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
-   [    0.101879] NET: Registered protocol family 16
-   [    0.110336] microchip-pfsoc-clkcfg 20002000.clkcfg: Registered PFSOC core clocks
-   [    0.132717] usbcore: registered new interface driver usbfs
-   [    0.138225] usbcore: registered new interface driver hub
-   [    0.143813] usbcore: registered new device driver usb
-   [    0.148939] pps_core: LinuxPPS API ver. 1 registered
-   [    0.153929] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <[email protected]>
-   [    0.163071] PTP clock support registered
-   [    0.168521] clocksource: Switched to clocksource riscv_clocksource
-   [    0.174927] VFS: Disk quotas dquot_6.6.0
-   [    0.179016] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
-   [    0.205536] NET: Registered protocol family 2
-   [    0.210944] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
-   [    0.219393] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
-   [    0.227497] TCP bind hash table entries: 8192 (order: 5, 131072 bytes, linear)
-   [    0.235440] TCP: Hash tables configured (established 8192 bind 8192)
-   [    0.242537] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
-   [    0.249285] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
-   [    0.256690] NET: Registered protocol family 1
-   [    0.262585] workingset: timestamp_bits=62 max_order=18 bucket_order=0
-   [    0.281036] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 249)
-   [    0.288481] io scheduler mq-deadline registered
-   [    0.292983] io scheduler kyber registered
-   [    0.298895] microsemi,mss-gpio 20122000.gpio: Microsemi MSS GPIO registered 32 GPIOs
-   [    0.453723] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
-   [    0.462911] printk: console [ttyS0] disabled
-   [    0.467216] 20100000.serial: ttyS0 at MMIO 0x20100000 (irq = 12, base_baud = 9375000) is a 16550A
-   [    0.476201] printk: console [ttyS0] enabled
-   [    0.476201] printk: console [ttyS0] enabled
-   [    0.484576] printk: bootconsole [sbi0] disabled
-   [    0.484576] printk: bootconsole [sbi0] disabled
-   [    0.494920] 20102000.serial: ttyS1 at MMIO 0x20102000 (irq = 13, base_baud = 9375000) is a 16550A
-   [    0.505068] 20104000.serial: ttyS2 at MMIO 0x20104000 (irq = 14, base_baud = 9375000) is a 16550A
-   [    0.533336] loop: module loaded
-   [    0.572284] Rounding down aligned max_sectors from 4294967295 to 4294967288
-   [    0.580000] db_root: cannot open: /etc/target
-   [    0.585413] libphy: Fixed MDIO Bus: probed
-   [    0.591526] libphy: MACB_mii_bus: probed
-   [    0.598060] macb 20112000.ethernet eth0: Cadence GEM rev 0x0107010c at 0x20112000 irq 17 (56:34:12:00:fc:00)
-   [    0.608352] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
-   [    0.615001] ehci-platform: EHCI generic platform driver
-   [    0.620446] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
-   [    0.626632] ohci-platform: OHCI generic platform driver
-   [    0.632326] usbcore: registered new interface driver cdc_acm
-   [    0.637996] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
-   [    0.646459] i2c /dev entries driver
-   [    0.650852] microsemi-mss-i2c 2010b000.i2c: Microsemi I2C Probe Complete
-   [    0.658010] sdhci: Secure Digital Host Controller Interface driver
-   [    0.664326] sdhci: Copyright(c) Pierre Ossman
-   [    0.668754] sdhci-pltfm: SDHCI platform and OF driver helper
-   [    0.706845] mmc0: SDHCI controller on 20008000.sdhc [20008000.sdhc] using ADMA 64-bit
-   [    0.715052] usbcore: registered new interface driver usbhid
-   [    0.720722] usbhid: USB HID core driver
-   [    0.725174] pac193x 0-0010: Chip revision: 0x03
-   [    0.733339] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 0 active
-   [    0.740127] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 1 active
-   [    0.746881] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 2 active
-   [    0.753686] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 3 active
-   [    0.760495] pac193x 0-0010: :pac193x_prep_iio_channels: Active chip channels: 25
-   [    0.778006] NET: Registered protocol family 10
-   [    0.784929] Segment Routing with IPv6
-   [    0.788875] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
-   [    0.795743] NET: Registered protocol family 17
-   [    0.801191] hctosys: unable to open rtc device (rtc0)
-   [    0.807774] Waiting for root device /dev/mmcblk0p3...
-   [    0.858506] mmc0: mmc_select_hs200 failed, error -74
-   [    0.865764] mmc0: new MMC card at address 0001
-   [    0.872564] mmcblk0: mmc0:0001 DG4008 7.28 GiB
-   [    0.878777] mmcblk0boot0: mmc0:0001 DG4008 partition 1 4.00 MiB
-   [    0.886182] mmcblk0boot1: mmc0:0001 DG4008 partition 2 4.00 MiB
-   [    0.892633] mmcblk0rpmb: mmc0:0001 DG4008 partition 3 4.00 MiB, chardev (247:0)
-   [    0.919029] GPT:Primary header thinks Alt. header is not at the end of the disk.
-   [    0.926448] GPT:2255841 != 15273599
-   [    0.930019] GPT:Alternate GPT header not at the end of the disk.
-   [    0.936029] GPT:2255841 != 15273599
-   [    0.939583] GPT: Use GNU Parted to correct GPT errors.
-   [    0.944800]  mmcblk0: p1 p2 p3
-   [    0.966696] EXT4-fs (mmcblk0p3): INFO: recovery required on readonly filesystem
-   [    0.974105] EXT4-fs (mmcblk0p3): write access will be enabled during recovery
-   [    1.052362] random: fast init done
-   [    1.057961] EXT4-fs (mmcblk0p3): recovery complete
-   [    1.065734] EXT4-fs (mmcblk0p3): mounted filesystem with ordered data mode. Opts: (null)
-   [    1.074002] VFS: Mounted root (ext4 filesystem) readonly on device 179:3.
-   [    1.081654] Freeing unused kernel memory: 168K
-   [    1.086108] This architecture does not have kernel memory protection.
-   [    1.092629] Run /sbin/init as init process
-   [    1.702217] systemd[1]: System time before build time, advancing clock.
-   [    1.754192] systemd[1]: systemd 244.3+ running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR -SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN -PCRE2 default-hierarchy=hybrid)
-   [    1.776361] systemd[1]: Detected architecture riscv64.
-
-   Welcome to OpenEmbedded nodistro.0!
-
-   [    1.829651] systemd[1]: Set hostname to <icicle-kit-es>.
-   [    2.648597] random: systemd: uninitialized urandom read (16 bytes read)
-   [    2.657485] systemd[1]: Created slice system-getty.slice.
-   [  OK  ] Created slice system-getty.slice.
-   [    2.698779] random: systemd: uninitialized urandom read (16 bytes read)
-   [    2.706317] systemd[1]: Created slice system-serial\x2dgetty.slice.
-   [  OK  ] Created slice system-serial\x2dgetty.slice.
-   [    2.748716] random: systemd: uninitialized urandom read (16 bytes read)
-   [    2.756098] systemd[1]: Created slice User and Session Slice.
-   [  OK  ] Created slice User and Session Slice.
-   [    2.789065] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
-   [  OK  ] Started Dispatch Password …ts to Console Directory Watch.
-   [    2.828974] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
-   [  OK  ] Started Forward Password R…uests to Wall Directory Watch.
-   [    2.869009] systemd[1]: Reached target Paths.
-   [  OK  ] Reached target Paths.
-   [    2.898808] systemd[1]: Reached target Remote File Systems.
-   [  OK  ] Reached target Remote File Systems.
-   [    2.938771] systemd[1]: Reached target Slices.
-   [  OK  ] Reached target Slices.
-   [    2.968754] systemd[1]: Reached target Swap.
-   [  OK  ] Reached target Swap.
-   [    2.999283] systemd[1]: Listening on initctl Compatibility Named Pipe.
-   [  OK  ] Listening on initctl Compatibility Named Pipe.
-   [    3.060458] systemd[1]: Condition check resulted in Journal Audit Socket being skipped.
-   [    3.069826] systemd[1]: Listening on Journal Socket (/dev/log).
-   [  OK  ] Listening on Journal Socket (/dev/log).
-   [    3.109601] systemd[1]: Listening on Journal Socket.
-   [  OK  ] Listening on Journal Socket.
-   [    3.149868] systemd[1]: Listening on Network Service Netlink Socket.
-   [  OK  ] Listening on Network Service Netlink Socket.
-   [    3.189419] systemd[1]: Listening on udev Control Socket.
-   [  OK  ] Listening on udev Control Socket.
-   [    3.229179] systemd[1]: Listening on udev Kernel Socket.
-   [  OK  ] Listening on udev Kernel Socket.
-   [    3.269520] systemd[1]: Condition check resulted in Huge Pages File System being skipped.
-   [    3.278477] systemd[1]: Condition check resulted in POSIX Message Queue File System being skipped.
-   [    3.288200] systemd[1]: Condition check resulted in Kernel Debug File System being skipped.
-   [    3.302570] systemd[1]: Mounting Temporary Directory (/tmp)...
-            Mounting Temporary Directory (/tmp)...
-   [    3.339226] systemd[1]: Condition check resulted in Create list of static device nodes for the current kernel being skipped.
-   [    3.355883] systemd[1]: Starting File System Check on Root Device...
-            Starting File System Check on Root Device...
-   [    3.407220] systemd[1]: Starting Journal Service...
-            Starting Journal Service...
-   [    3.422441] systemd[1]: Condition check resulted in Load Kernel Modules being skipped.
-   [    3.431770] systemd[1]: Condition check resulted in FUSE Control File System being skipped.
-   [    3.446415] systemd[1]: Mounting Kernel Configuration File System...
-            Mounting Kernel Configuration File System...
-   [    3.458983] systemd[1]: Starting Apply Kernel Variables...
-            Starting Apply Kernel Variables...
-   [    3.471368] systemd[1]: Starting udev Coldplug all Devices...
-            Starting udev Coldplug all Devices...
-   [    3.491071] systemd[1]: Mounted Temporary Directory (/tmp).
-   [  OK      3.498114] systemd[1]: Mounted Kernel Configuration File System.
-   0m] Mounted Temporary Directory (/tmp).
-   [  OK  ] Mounted Kernel Configuration File System.
-   [    3.550853] systemd[1]: Started Apply Kernel Variables.
-   [  OK      3.557535] systemd[1]: Started Journal Service.
-   0m] Started Apply Kernel Variables.
-   [  OK  ] Started Journal Service.
-   [  OK  ] Started udev Coldplug all Devices.
-   [  OK  ] Started File System Check on Root Device.
-            Starting Remount Root and Kernel File Systems...
-   [    8.133469] EXT4-fs (mmcblk0p3): re-mounted. Opts: (null)
-   [  OK  ] Started Remount Root and Kernel File Systems.
-            Starting Flush Journal to Persistent Storage...
-   [    8.215327] systemd-journald[77]: Received client request to flush runtime journal.
-            Starting Create Static Device Nodes in /dev...
-   [  OK  ] Started Flush Journal to Persistent Storage.
-   [  OK  ] Started Create Static Device Nodes in /dev.
-   [  OK  ] Reached target Local File Systems (Pre).
-            Mounting /var/volatile...
-            Starting udev Kernel Device Manager...
-   [  OK  ] Mounted /var/volatile.
-            Starting Load/Save Random Seed...
-   [  OK  ] Reached target Local File Systems.
-            Starting Create Volatile Files and Directories...
-   [  OK  ] Started udev Kernel Device Manager.
-   [  OK  ] Started Create Volatile Files and Directories.
-            Starting Network Time Synchronization...
-            Starting Update UTMP about System Boot/Shutdown...
-   [  OK  ] Started Update UTMP about System Boot/Shutdown.
-   [  OK  ] Started Network Time Synchronization.
-   [   11.618575] random: crng init done
-   [   11.622007] random: 7 urandom warning(s) missed due to ratelimiting
-   [  OK  ] Started Load/Save Random Seed.
-   [  OK  ] Reached target System Initialization.
-   [  OK  ] Started Daily Cleanup of Temporary Directories.
-   [  OK  ] Reached target System Time Set.
-   [  OK  ] Reached target System Time Synchronized.
-   [  OK  ] Reached target Timers.
-   [  OK  ] Listening on D-Bus System Message Bus Socket.
-   [  OK  ] Listening on dropbear.socket.
-   [  OK  ] Reached target Sockets.
-   [  OK  ] Reached target Basic System.
-   [  OK  ] Started D-Bus System Message Bus.
-            Starting IPv6 Packet Filtering Framework...
-            Starting IPv4 Packet Filtering Framework...
-            Starting Login Service...
-   [  OK  ] Started IPv6 Packet Filtering Framework.
-   [  OK  ] Started IPv4 Packet Filtering Framework.
-   [  OK  ] Reached target Network (Pre).
-            Starting Network Service...
-   [  OK  ] Started Login Service.
-   [   12.602455] macb 20112000.ethernet eth0: PHY [20112000.ethernet-ffffffff:09] driver [Vitesse VSC8662] (irq=POLL)
-   [   12.612795] macb 20112000.ethernet eth0: configuring for phy/sgmii link mode
-   [   12.622153] pps pps0: new PPS source ptp0
-   [  OK     12.626725] macb 20112000.ethernet: gem-ptp-timer ptp clock registered.
-   0m] Started Network Service.
-            Starting Network Name Resolution...
-   [  OK  ] Started Network Name Resolution.
-   [  OK  ] Reached target Network.
-   [  OK  ] Reached target Host and Network Name Lookups.
-   [  OK  ] Started Collectd.
-   [  OK  ] Started Collectd.
-            Starting Permit User Sessions...
-   [  OK  ] Started Permit User Sessions.
-   [  OK  ] Started Getty on tty1.
-   [  OK  ] Started Serial Getty on ttyS0.
-   [  OK  ] Reached target Login Prompts.
-   [  OK  ] Reached target Multi-User System.
-            Starting Update UTMP about System Runlevel Changes...
-   [  OK  ] Started Update UTMP about System Runlevel Changes.
-
-   OpenEmbedded nodistro.0 icicle-kit-es ttyS0
-
-   icicle-kit-es login: [   15.795564] macb 20112000.ethernet eth0: Link is Up - 1Gbps/Full - flow control tx
-   [   15.803306] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
-
-   icicle-kit-es login: root
-   root@icicle-kit-es:~#
+.. include:: mpfs_common.rst
diff --git a/doc/board/microchip/mpfs_video.rst b/doc/board/microchip/mpfs_video.rst
new file mode 100644
index 00000000000..25df63ff14b
--- /dev/null
+++ b/doc/board/microchip/mpfs_video.rst
@@ -0,0 +1,105 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Microchip PolarFire SoC Video Kit
+==================================
+
+RISC-V PolarFire SoC
+--------------------
+
+The PolarFire SoC is the 4+1 64-bit RISC-V SoC from Microchip.
+
+The Video Kit development platform is based on PolarFire SoC and capable
+of running Linux.
+
+Mainline support
+----------------
+
+The support for following drivers are already enabled:
+
+1. NS16550 UART Driver.
+2. Microchip Clock Driver.
+3. Cadence MACB ethernet driver for networking support.
+4. Cadence MMC Driver for eMMC/SD support.
+5. Microchip I2C Driver.
+
+.. include:: mpfs_build_boot.rst
+
+Microchip boot-flow
+~~~~~~~~~~~~~~~~~~~
+
+HSS with OpenSBI (M-Mode) -> U-Boot (S-Mode) -> Linux (S-Mode)
+
+Build the HSS (Hart Software Services) - Microchip boot-flow
+''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
+
+(Note: HSS git repo is at https://github.com/polarfire-soc/hart-software-services)
+
+1. Configure
+
+.. code-block:: none
+
+   make BOARD=mpfs-video-kit config
+
+Alternatively, copy the default config for Microchip boot-flow.
+
+.. code-block:: none
+
+   cp boards/mpfs-video-kit/def_config .config
+
+2. make BOARD=mpfs-video-kit
+3. In the Default subdirectory, the standard build will create hss.elf and
+   various binary formats (hss.hex and hss.bin).
+
+The FPGA design will use the hss.hex or hss.bin.
+
+.. include:: mpfs_design_hss.rst
+
+Custom boot-flow
+~~~~~~~~~~~~~~~~
+
+HSS without OpenSBI (M-Mode) -> OpenSBI (M-Mode) -> U-Boot (S-Mode) -> Linux (S-Mode)
+
+Build OpenSBI
+'''''''''''''
+
+1. Get the OpenSBI source
+
+.. code-block:: none
+
+   git clone https://github.com/riscv/opensbi.git
+   cd opensbi
+
+2. Build
+
+.. code-block:: none
+
+   make PLATFORM=generic FW_PAYLOAD_PATH=<u-boot-directory>/u-boot.bin
+   FW_FDT_PATH=<u-boot-directory>/dts/upstream/src/riscv/microchip/mpfs-sev-kit-.dtb
+
+3. Output "fw_payload.bin" file available at
+   "<opensbi-directory>/build/platform/generic/firmware/fw_payload.bin"
+
+Build the HSS (Hart Software Services)- Custom boot-flow
+''''''''''''''''''''''''''''''''''''''''''''''''''''''''
+
+(Note: HSS git repo is at https://github.com/polarfire-soc/hart-software-services)
+
+1. Configure
+
+.. code-block:: none
+
+   make BOARD=mpfs-video-kit config
+
+Alternatively, copy the default custom config for Custom boot-flow.
+
+.. code-block:: none
+
+   cp boards/mpfs-video-kit/def_config_custom .config
+
+2. make BOARD=mpfs-video-kit
+3. In the Default subdirectory, the standard build will create hss.elf and
+   various binary formats (hss.hex and hss.bin).
+
+The FPGA design will use the hss.hex or hss.bin.
+
+.. include:: mpfs_common.rst
diff --git a/drivers/clk/thead/clk-th1520-ap.c b/drivers/clk/thead/clk-th1520-ap.c
index 822cf0809d5..6899e1b595a 100644
--- a/drivers/clk/thead/clk-th1520-ap.c
+++ b/drivers/clk/thead/clk-th1520-ap.c
@@ -235,6 +235,7 @@ U_BOOT_DRIVER(th1520_clk_div) = {
 	.name	= "th1520_clk_div",
 	.id	= UCLASS_CLK,
 	.ops	= &ccu_div_ops,
+	.flags	= DM_FLAG_PRE_RELOC,
 };
 
 static unsigned long th1520_pll_vco_recalc_rate(struct clk *clk,
@@ -302,6 +303,7 @@ U_BOOT_DRIVER(th1520_clk_pll) = {
 	.name	= "th1520_clk_pll",
 	.id	= UCLASS_CLK,
 	.ops	= &clk_pll_ops,
+	.flags	= DM_FLAG_PRE_RELOC,
 };
 
 static struct ccu_pll cpu_pll0_clk = {
@@ -1030,4 +1032,5 @@ U_BOOT_DRIVER(th1520_clk) = {
 	.of_match	= th1520_clk_match,
 	.probe		= th1520_clk_probe,
 	.ops		= &th1520_clk_ops,
+	.flags		= DM_FLAG_PRE_RELOC,
 };
diff --git a/drivers/gpio/mpfs_gpio.c b/drivers/gpio/mpfs_gpio.c
index 9bbeada4ef5..35eed596c10 100644
--- a/drivers/gpio/mpfs_gpio.c
+++ b/drivers/gpio/mpfs_gpio.c
@@ -75,7 +75,7 @@ static int mchp_gpio_direction_output(struct udevice *dev, u32 offset, int value
 	return 0;
 }
 
-static bool mchp_gpio_get_value(struct udevice *dev, u32 offset)
+static int mchp_gpio_get_value(struct udevice *dev, u32 offset)
 {
 	struct mchp_gpio_plat *plat = dev_get_plat(dev);
 	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
@@ -136,7 +136,7 @@ static int mchp_gpio_probe(struct udevice *dev)
 	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
 	char name[18], *str;
 
-	plat->regs = dev_get_driver_data(dev);
+	plat->regs = (struct mpfs_gpio_reg_offsets *)dev_get_driver_data(dev);
 	sprintf(name, "gpio@%4lx_", (uintptr_t)plat->base);
 	str = strdup(name);
 	if (!str)
@@ -160,10 +160,10 @@ static const struct mpfs_gpio_reg_offsets coregpio_reg_offsets = {
 static const struct udevice_id mchp_gpio_match[] = {
 	{
 		.compatible = "microchip,mpfs-gpio",
-		.data = &mpfs_reg_offsets,
+		.data = (unsigned long)&mpfs_reg_offsets,
 	}, {
 		.compatible = "microchip,coregpio-rtl-v3",
-		.data = &coregpio_reg_offsets,
+		.data = (unsigned long)&coregpio_reg_offsets,
 	},
 	{ /* end of list */ }
 };
diff --git a/drivers/misc/mpfs_syscontroller.c b/drivers/misc/mpfs_syscontroller.c
index 41e80815ab5..f608d5518b0 100644
--- a/drivers/misc/mpfs_syscontroller.c
+++ b/drivers/misc/mpfs_syscontroller.c
@@ -22,7 +22,27 @@
 #include <misc.h>
 #include <mpfs-mailbox.h>
 
+#define SYS_SPI_CMD						0x50
+#define SYS_SPI_MAILBOX_DATA_LEN		17
+#define SYS_SPI_MAILBOX_SRC_OFFSET		8
+#define SYS_SPI_MAILBOX_LENGTH_OFFSET	12
+#define SYS_SPI_MAILBOX_FREQ_OFFSET		16
+#define SYS_SPI_MAILBOX_FREQ			3
+#define SPI_FLASH_ADDR					0x400
+
 /* Descriptor table */
+#define START_OFFSET					4
+#define END_OFFSET						8
+#define SIZE_OFFSET						12
+#define DESC_NEXT						12
+#define DESC_RESERVED_SIZE				0
+#define DESC_SIZE						16
+
+#define DESIGN_MAGIC_0					0x4d /* 'M' */
+#define DESIGN_MAGIC_1					0x43 /* 'C'*/
+#define DESIGN_MAGIC_2					0x48 /* 'H'*/
+#define DESIGN_MAGIC_3					0x50 /* 'P'*/
+
 #define CMD_OPCODE						0x0u
 #define CMD_DATA_SIZE					0U
 #define CMD_DATA						NULL
@@ -109,6 +129,186 @@ int mpfs_syscontroller_read_sernum(struct mpfs_sys_serv *sys_serv_priv, u8 *devi
 }
 EXPORT_SYMBOL(mpfs_syscontroller_read_sernum);
 
+static u16 mpfs_syscontroller_service_spi_copy(struct mpfs_sys_serv *sys_serv_priv, u64 dst_addr, u32 src_addr, u32 length)
+{
+	int ret;
+	u32 mailbox_format[SYS_SPI_MAILBOX_DATA_LEN];
+
+	*(u64 *)mailbox_format = dst_addr;
+	mailbox_format[SYS_SPI_MAILBOX_SRC_OFFSET/4] = src_addr;
+	mailbox_format[SYS_SPI_MAILBOX_LENGTH_OFFSET/4] = length;
+	mailbox_format[SYS_SPI_MAILBOX_FREQ_OFFSET/4] = SYS_SPI_MAILBOX_FREQ;
+
+	struct mpfs_mss_response response = {
+		.resp_status = 0U,
+		.resp_msg = mailbox_format,
+		.resp_size = RESP_BYTES};
+	struct mpfs_mss_msg msg = {
+		.cmd_opcode = SYS_SPI_CMD,
+		.cmd_data_size = SYS_SPI_MAILBOX_DATA_LEN,
+		.response = &response,
+		.cmd_data = (u8 *)mailbox_format,
+		.mbox_offset = MBOX_OFFSET,
+		.resp_offset = RESP_OFFSET};
+
+	ret = mpfs_syscontroller_run_service(sys_serv_priv->sys_controller, &msg);
+	if (ret) {
+		dev_err(sys_serv_priv->sys_controller->chan.dev, "Service failed: %d, abort. Failure: %u\n", ret, msg.response->resp_status);
+	}
+
+	return ret;
+}
+
+static u16 mpfs_syscontroller_get_dtbo_desc_header(struct mpfs_sys_serv *sys_serv_priv, u8 *desc_data, u32 desc_addr)
+{
+	u32 length, no_of_descs;
+	int ret = -ENOENT;
+
+	/* Get first four bytes to calculate length */
+	ret = mpfs_syscontroller_service_spi_copy(sys_serv_priv, (u64)desc_data, desc_addr, BYTES_4);
+	if (!ret) {
+		no_of_descs = *((u32 *)desc_data);
+		if (no_of_descs) {
+			length = DESC_SIZE + ((no_of_descs - 1) * DESC_SIZE);
+			ret = mpfs_syscontroller_service_spi_copy(sys_serv_priv, (u64)desc_data, desc_addr,
+						      length);
+		}
+	}
+
+	return ret;
+}
+
+static u8 *mpfs_syscontroller_get_dtbo(struct mpfs_sys_serv *sys_serv_priv, u32 start_addr, u32 size)
+{
+	int ret;
+	u8 *dtbo;
+
+	/* Intentionally never freed, even on success so that u-boot "userspace" can access it. */
+	dtbo = (u8 *)malloc(size);
+
+	ret = mpfs_syscontroller_service_spi_copy(sys_serv_priv, (u64)dtbo, start_addr, size);
+	if (ret) {
+		free(dtbo);
+		dtbo = NULL;
+	}
+
+	return dtbo;
+}
+
+static void mpfs_syscontroller_parse_desc_header(struct mpfs_sys_serv *sys_serv_priv, u8 *desc_header, u8 *no_of_dtbo, u32 *dtbos_size)
+{
+	u32 dtbo_desc_start_addr;
+	u32 dtbo_desc_size;
+	u32 no_of_descs;
+	u16 i;
+	u8 dtbo_name[16];
+	u8 dtbo_addr[20];
+	u8 *desc;
+	u8 *dtbo;
+
+	no_of_descs = *((u32 *)desc_header);
+
+	for (i = 0; i < no_of_descs; i++) {
+		desc = &desc_header[START_OFFSET + (DESC_NEXT * i)];
+		/*
+		 * The dtbo info structure contains addresses that are relative
+		 * to the start of structure, so the offset of the structure in
+		 * flash must be added to get the actual start address.
+		 */
+		dtbo_desc_start_addr = *((u32 *)desc) + SPI_FLASH_ADDR;
+
+		desc = &desc_header[SIZE_OFFSET + (DESC_NEXT * i)];
+		dtbo_desc_size = *((u32 *)desc);
+
+		dtbo = mpfs_syscontroller_get_dtbo(sys_serv_priv, dtbo_desc_start_addr, dtbo_desc_size);
+		if (dtbo) {
+			sprintf(dtbo_name, "dtbo_image%d", *no_of_dtbo);
+			sprintf(dtbo_addr, "0x%llx", (u64)dtbo);
+			env_set(dtbo_name, dtbo_addr);
+			++*no_of_dtbo;
+			*dtbos_size += dtbo_desc_size;
+		}
+	}
+}
+
+void mpfs_syscontroller_process_dtbo(struct mpfs_sys_serv *sys_serv_priv)
+{
+	u32 desc_length;
+	u32 dtbo_desc_addr;
+	u32 dtbo_addr[5];
+	u16 i, hart, no_of_harts;
+	u8 design_info_desc[256];
+	u8 dtbo_desc_data[256];
+	u8 no_of_dtbos[8];
+	u8 dtbo_size[8];
+	u8 *desc;
+	u8 no_of_dtbo = 0;
+	u32 dtbos_size = 0;
+	int ret;
+
+	/* Read first 10 bytes to verify the descriptor is found or not */
+	ret = mpfs_syscontroller_service_spi_copy(sys_serv_priv, (u64)design_info_desc, SPI_FLASH_ADDR, 10);
+	if (ret) {
+		sprintf(no_of_dtbos, "%d", no_of_dtbo);
+		env_set("no_of_overlays", no_of_dtbos);
+		sprintf(dtbo_size, "%d", dtbos_size);
+		env_set("dtbo_size", dtbo_size);
+		return;
+	}
+
+	if (design_info_desc[0] != DESIGN_MAGIC_0 ||
+	    design_info_desc[1] != DESIGN_MAGIC_1 ||
+	    design_info_desc[2] != DESIGN_MAGIC_2 ||
+	    design_info_desc[3] != DESIGN_MAGIC_3) {
+		dev_dbg(sys_serv_priv->dev, "magic not found in desc structure.\n");
+		sprintf(no_of_dtbos, "%d", no_of_dtbo);
+		env_set("no_of_overlays", no_of_dtbos);
+		sprintf(dtbo_size, "%d", dtbos_size);
+		env_set("dtbo_size", dtbo_size);
+		return;
+	}
+	desc_length = *((u32 *)&design_info_desc[4]);
+	/* Read Design descriptor */
+	ret = mpfs_syscontroller_service_spi_copy(sys_serv_priv, (u64)design_info_desc,
+						SPI_FLASH_ADDR, desc_length);
+	if (ret)
+		return;
+
+	no_of_harts = *((u16 *)&design_info_desc[10]);
+
+	for (hart = 0; hart < no_of_harts; hart++) {
+		/* Start address of DTBO descriptor */
+		desc = &design_info_desc[(0x4 * hart) + 0xc];
+
+		dtbo_desc_addr = *((u32 *)desc);
+		dtbo_addr[hart] = dtbo_desc_addr;
+
+		if (!dtbo_addr[hart])
+			continue;
+
+		for (i = 0; i < hart; i++) {
+			if (dtbo_addr[hart] == dtbo_addr[i])
+				continue;
+		}
+
+		if (hart && hart == i)
+			continue;
+
+		dtbo_desc_addr += SPI_FLASH_ADDR;
+		ret = mpfs_syscontroller_get_dtbo_desc_header(sys_serv_priv, dtbo_desc_data,
+							dtbo_desc_addr);
+		if (ret)
+			continue;
+		else
+			mpfs_syscontroller_parse_desc_header(sys_serv_priv, dtbo_desc_data, &no_of_dtbo, &dtbos_size);
+	}
+	sprintf(no_of_dtbos, "%d", no_of_dtbo);
+	env_set("no_of_overlays", no_of_dtbos);
+	sprintf(dtbo_size, "%d", dtbos_size);
+	env_set("dtbo_size", dtbo_size);
+}
+EXPORT_SYMBOL(mpfs_syscontroller_process_dtbo);
+
 static int mpfs_syscontroller_probe(struct udevice *dev)
 {
 	struct mpfs_syscontroller_priv *sys_controller = dev_get_priv(dev);
diff --git a/drivers/pci/pcie_starfive_jh7110.c b/drivers/pci/pcie_starfive_jh7110.c
index 51aca7359ff..0908ae16b67 100644
--- a/drivers/pci/pcie_starfive_jh7110.c
+++ b/drivers/pci/pcie_starfive_jh7110.c
@@ -292,8 +292,6 @@ static int starfive_pcie_probe(struct udevice *dev)
 	if (ret)
 		return ret;
 
-	dev_err(dev, "Starfive PCIe bus probed.\n");
-
 	return 0;
 }
 
diff --git a/drivers/pinctrl/pinctrl-th1520.c b/drivers/pinctrl/pinctrl-th1520.c
index be7e508f8a4..4eead0875d8 100644
--- a/drivers/pinctrl/pinctrl-th1520.c
+++ b/drivers/pinctrl/pinctrl-th1520.c
@@ -697,4 +697,5 @@ U_BOOT_DRIVER(th1520_pinctrl) = {
 	.probe = th1520_pinctrl_probe,
 	.priv_auto = sizeof(struct th1520_pinctrl),
 	.ops = &th1520_pinctrl_ops,
+	.flags = DM_FLAG_PRE_RELOC,
 };
diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_generic.h
index 0077f6a5f95..0077f6a5f95 100644
--- a/include/configs/microchip_mpfs_icicle.h
+++ b/include/configs/microchip_mpfs_generic.h
diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h
index cf4fcb90b04..dad59cc0d58 100644
--- a/include/configs/qemu-riscv.h
+++ b/include/configs/qemu-riscv.h
@@ -32,7 +32,6 @@
 
 #define CFG_EXTRA_ENV_SETTINGS \
 	CFG_STD_DEVICES_SETTINGS \
-	"fdt_high=0xffffffffffffffff\0" \
 	"initrd_high=0xffffffffffffffff\0" \
 	"kernel_addr_r=0x84000000\0" \
 	"kernel_comp_addr_r=0x88000000\0" \
diff --git a/include/configs/voyager.h b/include/configs/voyager.h
index f6630b07ec9..0e5fed99dd0 100644
--- a/include/configs/voyager.h
+++ b/include/configs/voyager.h
@@ -26,7 +26,6 @@
 #include <config_distro_bootcmd.h>
 
 #define CFG_EXTRA_ENV_SETTINGS	\
-				"fdt_high=0xffffffffffffffff\0" \
 				"initrd_high=0xffffffffffffffff\0" \
 				"kernel_addr_r=0x400600000\0" \
 				"kernel_comp_addr_r=0x404600000\0" \
author	Tom Rini <[email protected]>	2025-09-20 10:02:00 -0600
committer	Tom Rini <[email protected]>	2025-09-20 10:02:00 -0600
commit	464800d91b036cfd2df26598d8df2ac72d4569dd (patch)
tree	ee4fb80d4b33c9e75039a2f72fc055eb18a9400c
parent	31eee7d42b44ad7d0bad320461ba0c14750a61d9 (diff)
parent	10fdc2735da3a4825a5172056090eaf41e061627 (diff)