diff options
| author | Vishal Mahaveer <[email protected]> | 2026-06-05 14:38:29 -0500 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2026-07-03 10:09:56 -0600 |
| commit | 48b7c05d272747ec4d8f8f7eb53119ef149dcc7a (patch) | |
| tree | 622b1b91d57590fd7bcd62d7873de7be528df3a7 | |
| parent | c8a3552f7d9e6bd4554730e3dec10ff6c661f07c (diff) | |
arm: dts: k3-am642-evm/sk: enable MAIN UART1 for SYSFW logs
Enable MAIN UART1 in the R5 SPL device tree to collect system SYSFW
debug traces during early boot.
Signed-off-by: Vishal Mahaveer <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
| -rw-r--r-- | arch/arm/dts/k3-am642-r5-evm.dts | 10 | ||||
| -rw-r--r-- | arch/arm/dts/k3-am642-r5-sk.dts | 10 |
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts index e3d363a8e39..d1fe7efd006 100644 --- a/arch/arm/dts/k3-am642-r5-evm.dts +++ b/arch/arm/dts/k3-am642-r5-evm.dts @@ -23,3 +23,13 @@ clocks = <&clk_200mhz>; clock-names = "clk_xin"; }; + +&main_uart1_pins_default { + bootph-pre-ram; +}; + +/* Main UART1 is used for TIFS firmware logs */ +&main_uart1 { + bootph-pre-ram; + status="okay"; +}; diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts index 27f3e87fb90..19435cd1f5c 100644 --- a/arch/arm/dts/k3-am642-r5-sk.dts +++ b/arch/arm/dts/k3-am642-r5-sk.dts @@ -18,3 +18,13 @@ &serdes_wiz0 { status = "okay"; }; + +&main_uart1_pins_default { + bootph-pre-ram; +}; + +/* Main UART1 is used for TIFS firmware logs */ +&main_uart1 { + bootph-pre-ram; + status="okay"; +}; |