diff options
| author | Yangbo Lu <[email protected]> | 2020-03-19 15:18:54 +0800 |
|---|---|---|
| committer | Priyanka Jain <[email protected]> | 2020-03-30 08:12:13 +0530 |
| commit | 515f32973aa52ba75758b08606b447c82852cd80 (patch) | |
| tree | 0cc85fd204a8a6380545b1d01cf0640d318b973d | |
| parent | f83567e0c08e87e4aaeef80ce9ca45986977c451 (diff) | |
board: fsl: lx2160a: fix SDHC1_DAT4 signal routing
The SDHC1_DAT4 signal could be routes to SDHC1_VS or SDHC1
adapter slot for SDHC1 usage. When SDHC1 is selected in RCW,
do not force to route it to SDHC1 adapter slot if find it
has already been configued for SDHC1_VS.
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
| -rw-r--r-- | board/freescale/lx2160a/lx2160a.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 971c76bf504..4b20bb440f7 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -480,10 +480,16 @@ int config_board_mux(void) reg11 = SET_CFG_MUX3_SDHC1_SPI(reg11, 0x01); QIXIS_WRITE(brdcfg[11], reg11); } else { - /* Routes {SDHC1_DAT4} to SDHC1 adapter slot */ + /* + * If {SDHC1_DAT4} has been configured to route to SDHC1_VS, + * do not change it. + * Otherwise route {SDHC1_DAT4} to SDHC1 adapter slot. + */ reg11 = QIXIS_READ(brdcfg[11]); - reg11 = SET_CFG_MUX2_SDHC1_SPI(reg11, 0x00); - QIXIS_WRITE(brdcfg[11], reg11); + if ((reg11 & 0x30) != 0x30) { + reg11 = SET_CFG_MUX2_SDHC1_SPI(reg11, 0x00); + QIXIS_WRITE(brdcfg[11], reg11); + } /* - Routes {SDHC1_DAT5, SDHC1_DAT6} to SDHC1 adapter slot. * {SDHC1_DAT7, SDHC1_DS } to SDHC1 adapter slot. |