diff options
| author | Jonas Karlman <[email protected]> | 2025-08-01 17:09:27 +0000 |
|---|---|---|
| committer | Kever Yang <[email protected]> | 2025-12-14 00:02:10 +0800 |
| commit | 57dc75fb9be8f2508cb8c32dc5909c5b57876ace (patch) | |
| tree | ce00f46124b92422446581cf408807b53f32ddd7 | |
| parent | e22335a221f88e7f61171e752ca195663f86d81f (diff) | |
rockchip: sdram: Add rockchip_sdram_type() helper
Add a helper function based on rockchip_sdram_size() that return what
DRAM type is used on current running board.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
| -rw-r--r-- | arch/arm/include/asm/arch-rockchip/sdram.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/sdram.c | 15 |
2 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/sdram.h b/arch/arm/include/asm/arch-rockchip/sdram.h index 4fb45ac5c76..476fc1c4ee3 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram.h +++ b/arch/arm/include/asm/arch-rockchip/sdram.h @@ -87,6 +87,9 @@ enum { #define SYS_REG_CS1_COL_SHIFT(ch) (0 + (ch) * 2) #define SYS_REG_CS1_COL_MASK 3 +/* Get sdram type decode from reg */ +u8 rockchip_sdram_type(phys_addr_t reg); + /* Get sdram size decode from reg */ size_t rockchip_sdram_size(phys_addr_t reg); diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c index 3bc482331c7..d560f90e873 100644 --- a/arch/arm/mach-rockchip/sdram.c +++ b/arch/arm/mach-rockchip/sdram.c @@ -345,6 +345,21 @@ int dram_init_banksize(void) return 0; } +u8 rockchip_sdram_type(phys_addr_t reg) +{ + u32 dram_type, version; + u32 sys_reg2 = readl(reg); + u32 sys_reg3 = readl(reg + 4); + + dram_type = (sys_reg2 >> SYS_REG_DDRTYPE_SHIFT) & SYS_REG_DDRTYPE_MASK; + version = (sys_reg3 >> SYS_REG_VERSION_SHIFT) & SYS_REG_VERSION_MASK; + if (version >= 3) + dram_type |= ((sys_reg3 >> SYS_REG_EXTEND_DDRTYPE_SHIFT) & + SYS_REG_EXTEND_DDRTYPE_MASK) << 3; + + return dram_type; +} + size_t rockchip_sdram_size(phys_addr_t reg) { u32 rank, cs0_col, bk, cs0_row, cs1_row, bw, row_3_4; |
