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authorBrian Sune <[email protected]>2025-11-15 00:04:23 +0800
committerTien Fong Chee <[email protected]>2025-12-01 14:02:24 +0800
commit5b1fe6ef6b812c87a7f634cdfac81324ae9e09f7 (patch)
tree44ac185f4a1f2c8929c64c1dd887049b729fd3a4
parente291277689f62e2e9170d8e130d876de6161b363 (diff)
Altera SoCFpga Boot Stall Fix
Since U-Boot 2025.07 pure SD Card boot no longer works. Now Altera released 2025.07 shows the different on the u-boot files. After testing, the major root case is get_managers_addr. And this patch fix the SD boot stall via pulling from offical. Signed-off-by: Brian Sune <[email protected]> Reviewed-by: Tien Fong Chee <[email protected]>
-rw-r--r--arch/arm/mach-socfpga/misc.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 76747c2196a..07694107c8a 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -222,7 +222,7 @@ static int do_bridge(struct cmd_tbl *cmdtp, int flag, int argc,
}
U_BOOT_CMD(bridge, 3, 1, do_bridge,
- "SoCFPGA HPS FPGA bridge control",
+ "GEN5 SoCFPGA HPS FPGA bridge control",
"enable [mask] - Enable HPS-to-FPGA (Bit 0), LWHPS-to-FPGA (Bit 1), FPGA-to-HPS (Bit 2) bridges\n"
"bridge disable [mask] - Disable HPS-to-FPGA (Bit 0), LWHPS-to-FPGA (Bit 1), FPGA-to-HPS (Bit 2) bridges\n"
""
@@ -261,7 +261,16 @@ void socfpga_get_managers_addr(void)
if (ret)
hang();
- else if (IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X))
+ if (!IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) &&
+ !IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M) &&
+ !IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)) {
+ ret = socfpga_get_base_addr("altr,sys-mgr",
+ &socfpga_sysmgr_base);
+ if (ret)
+ hang();
+ }
+
+ if (IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X))
ret = socfpga_get_base_addr("intel,n5x-clkmgr",
&socfpga_clkmgr_base);
else if (!IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) &&