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authorMarek Vasut <[email protected]>2015-12-05 19:24:22 +0100
committerMarek Vasut <[email protected]>2015-12-20 03:36:50 +0100
commit5b5226a8e68eae394aed7ca2d7691ebd7ef8ba4e (patch)
treefb84459bcbb76a5046917393f02bb143032361d8
parentc90ada94fba5486d4b4d3773013804982ccadb56 (diff)
arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded data
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <[email protected]> Cc: Chin Liang See <[email protected]> Cc: Dinh Nguyen <[email protected]> Cc: Lukasz Majewski <[email protected]> Cc: Lukasz Majewski <[email protected]>
-rw-r--r--arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts5
-rw-r--r--configs/socfpga_de0_nano_soc_defconfig2
-rw-r--r--include/configs/socfpga_de0_nano_soc.h3
3 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
index b649c9ac089..dc09bed9019 100644
--- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
+++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
@@ -16,6 +16,7 @@
aliases {
ethernet0 = &gmac1;
+ udc0 = &usb1;
};
memory {
@@ -59,3 +60,7 @@
status = "okay";
u-boot,dm-pre-reloc;
};
+
+&usb1 {
+ status = "okay";
+};
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index a4f75e6f01e..65c119717bc 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -19,3 +19,5 @@ CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DM_MMC=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h
index 870192d31b1..d27aa9b2c11 100644
--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@@ -56,9 +56,6 @@
#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
/* USB */
-#ifdef CONFIG_CMD_USB
-#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
-#endif
#define CONFIG_G_DNL_MANUFACTURER "Terasic"
/* Extra Environment */