diff options
| author | Luca Weiss <[email protected]> | 2026-06-25 15:14:38 +0200 |
|---|---|---|
| committer | Casey Connolly <[email protected]> | 2026-06-30 13:04:59 +0200 |
| commit | 5c7ff1b5407199d94ac6ecb5c939ad07cb83e846 (patch) | |
| tree | 252018f7fbd8a6a8e022e31ff74d6cf590fc32b0 | |
| parent | a3f393c02cf10f44310c6ddf3dedf354c2e877a0 (diff) | |
clk/qcom: milos: Add remaining UFS clocks
With a recent change to the UFS driver, now all clocks need to be
available. Add them.
Signed-off-by: Luca Weiss <[email protected]>
Reviewed-by: Casey Connolly <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
| -rw-r--r-- | drivers/clk/qcom/clock-milos.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/qcom/clock-milos.c b/drivers/clk/qcom/clock-milos.c index afe59108559..571cd134f1c 100644 --- a/drivers/clk/qcom/clock-milos.c +++ b/drivers/clk/qcom/clock-milos.c @@ -98,6 +98,13 @@ static const struct gate_clk milos_clks[] = { GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x39028, BIT(0)), GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x39024, BIT(0)), GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0x3908c, BIT(0)), + GATE_CLK(GCC_UFS_PHY_AXI_CLK, 0x77018, BIT(0)), + GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_CLK, 0x770e4, BIT(0)), + GATE_CLK(GCC_UFS_PHY_AHB_CLK, 0x77024, BIT(0)), + GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x77068, BIT(0)), + GATE_CLK(GCC_UFS_PHY_TX_SYMBOL_0_CLK, 0x77028, BIT(0)), + GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_0_CLK, 0x7702c, BIT(0)), + GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_1_CLK, 0x770cc, BIT(0)), }; static int milos_enable(struct clk *clk) |