arm64: zynqmp: Wire gpio-delay driver for USB hub reset

USB hub requires longer delay to get out of the reset to work properly
that's why use gpio-delay to ensure enough waiting time.

Reviewed-by: Radhey Shyam Pandey <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/e206e3ab2ad266935b81f5e9d3af2ed47b866826.1770105146.git.michal.simek@amd.com

5 files changed, 53 insertions, 16 deletions

diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
index 832dc5ab245..8342479b108 100644
--- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
@@ -3,7 +3,7 @@
  * dts file for KD240 revA Carrier Card
  *
  * Copyright (C) 2021 - 2022, Xilinx, Inc.
- * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc.
+ * Copyright (C) 2022 - 2026, Advanced Micro Devices, Inc.
  *
  * Michal Simek <[email protected]>
  */
@@ -43,6 +43,13 @@
 		#clock-cells = <0>;
 		clock-frequency = <25000000>;
 	};
+
+	slg_delay: enable-delay {
+		compatible = "gpio-delay";
+		#gpio-cells = <3>;
+		gpio-controller;
+		gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &can0 {
@@ -116,7 +123,7 @@
 		reg = <1>;
 		peer-hub = <&hub_3_0>;
 		i2c-bus = <&hub>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -125,7 +132,7 @@
 		reg = <2>;
 		peer-hub = <&hub_2_0>;
 		i2c-bus = <&hub>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 };
 
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
index 532f6bf92bc..db042ffb4f3 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
@@ -77,6 +77,14 @@
 			};
 		};
 	};
+
+	slg_delay: enable-delay {
+		compatible = "gpio-delay";
+		#gpio-cells = <3>;
+		gpio-controller;
+		gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>,
+			<&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
@@ -187,7 +195,7 @@
 		reg = <1>;
 		peer-hub = <&hub_3_0>;
 		i2c-bus = <&hub_1>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -196,7 +204,7 @@
 		reg = <2>;
 		peer-hub = <&hub_2_0>;
 		i2c-bus = <&hub_1>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 };
 
@@ -224,7 +232,7 @@
 		reg = <1>;
 		peer-hub = <&hub1_3_0>;
 		i2c-bus = <&hub_2>;
-		reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 1 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -233,7 +241,7 @@
 		reg = <2>;
 		peer-hub = <&hub1_2_0>;
 		i2c-bus = <&hub_2>;
-		reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 1 10000 10000>;
 	};
 };
 
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
index 458d79e8119..e3567d0abfe 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
@@ -78,6 +78,14 @@
 			};
 		};
 	};
+
+	slg_delay: enable-delay {
+		compatible = "gpio-delay";
+		#gpio-cells = <3>;
+		gpio-controller;
+		gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>,
+			<&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
@@ -188,7 +196,7 @@
 		reg = <1>;
 		peer-hub = <&hub_3_0>;
 		i2c-bus = <&hub_1>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -197,7 +205,7 @@
 		reg = <2>;
 		peer-hub = <&hub_2_0>;
 		i2c-bus = <&hub_1>;
-		reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 };
 
@@ -225,7 +233,7 @@
 		reg = <1>;
 		peer-hub = <&hub1_3_0>;
 		i2c-bus = <&hub_2>;
-		reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 1 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -234,7 +242,7 @@
 		reg = <2>;
 		peer-hub = <&hub1_2_0>;
 		i2c-bus = <&hub_2>;
-		reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 1 10000 10000>;
 	};
 };
 
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
index e7417af8ae0..f93c7460a55 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
@@ -3,7 +3,7 @@
  * dts file for KV260 revA Carrier Card
  *
  * (C) Copyright 2020 - 2022, Xilinx, Inc.
- * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.
+ * (C) Copyright 2022 - 2026, Advanced Micro Devices, Inc.
  *
  * SD level shifter:
  * "A" - A01 board un-modified (NXP)
@@ -78,6 +78,13 @@
 			};
 		};
 	};
+
+	slg_delay: enable-delay {
+		compatible = "gpio-delay";
+		#gpio-cells = <3>;
+		gpio-controller;
+		gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
@@ -161,7 +168,7 @@
 		compatible = "usb424,2744";
 		reg = <1>;
 		peer-hub = <&hub_3_0>;
-		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -169,7 +176,7 @@
 		compatible = "usb424,5744";
 		reg = <2>;
 		peer-hub = <&hub_2_0>;
-		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 };
 
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
index 7a05180e58b..70de6933600 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
@@ -74,6 +74,13 @@
 			};
 		};
 	};
+
+	slg_delay: enable-delay {
+		compatible = "gpio-delay";
+		#gpio-cells = <3>;
+		gpio-controller;
+		gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
@@ -148,7 +155,7 @@
 		reg = <1>;
 		peer-hub = <&hub_3_0>;
 		i2c-bus = <&hub>;
-		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 
 	/* 3.0 hub on port 2 */
@@ -157,7 +164,7 @@
 		reg = <2>;
 		peer-hub = <&hub_2_0>;
 		i2c-bus = <&hub>;
-		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&slg_delay 0 10000 10000>;
 	};
 };