diff options
| author | Marek Vasut <[email protected]> | 2025-06-15 12:47:51 +0200 |
|---|---|---|
| committer | Marek Vasut <[email protected]> | 2025-06-18 17:18:43 +0200 |
| commit | 668b2d791d94d4fd6a4be6d7dfa822b072017378 (patch) | |
| tree | 0bfb00b4c0c9cb745b996e36f18dd8d03c2f1be4 | |
| parent | 17012e3068d047ad71460f039eeb0c3be63f82a0 (diff) | |
arm64: renesas: Move early SPL stack into System RAM SRAM on R-Car V4H boards
The CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xeb300000 does not make it into
board .config on either R-Car V4H White Hawk or Sparrow Hawk, remove
this configuration option. The early SPL stack is however pointing
into the RT-VRAM and may corrupt payload loaded into the RT-VRAM by
the BootROM. Set the early SPL stack at fixed location at the end of
System RAM instead, where it cannot interfere with the payload loaded
into RT-VRAM.
Signed-off-by: Marek Vasut <[email protected]>
| -rw-r--r-- | configs/r8a779g0_whitehawk_defconfig | 4 | ||||
| -rw-r--r-- | configs/r8a779g3_sparrowhawk_defconfig | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/configs/r8a779g0_whitehawk_defconfig b/configs/r8a779g0_whitehawk_defconfig index 8dcf8e35ee0..5d9cfc97a97 100644 --- a/configs/r8a779g0_whitehawk_defconfig +++ b/configs/r8a779g0_whitehawk_defconfig @@ -26,7 +26,9 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_RENESAS_RAVB=y CONFIG_BAUDRATE=921600 -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xeb300000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_HAVE_INIT_STACK=y +CONFIG_SPL_STACK=0xe6400000 CONFIG_SPL_DM_SPI=y CONFIG_SPL_TEXT_BASE=0xeb210000 CONFIG_SPL_STACK_R_ADDR=0x44000000 diff --git a/configs/r8a779g3_sparrowhawk_defconfig b/configs/r8a779g3_sparrowhawk_defconfig index 47fc536df81..7202828cd66 100644 --- a/configs/r8a779g3_sparrowhawk_defconfig +++ b/configs/r8a779g3_sparrowhawk_defconfig @@ -29,7 +29,9 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_RENESAS_RAVB=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xeb300000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_HAVE_INIT_STACK=y +CONFIG_SPL_STACK=0xe6400000 CONFIG_SPL_DM_SPI=y CONFIG_SPL_TEXT_BASE=0xeb210000 CONFIG_SPL_STACK_R_ADDR=0x44000000 |