diff options
| author | Wasim Khan <[email protected]> | 2021-01-13 12:01:23 +0100 |
|---|---|---|
| committer | Priyanka Jain <[email protected]> | 2021-02-08 14:01:16 +0530 |
| commit | 67477bd0ac67ffcc0ef871403968c78e32c480e9 (patch) | |
| tree | 3de434b4c6cc9c4ffe18bb6b300b5a41e2f39357 | |
| parent | 3dbc47c9e5351227c1cad36df77eefe9aeb6c555 (diff) | |
armv8: lx2: SVR_SOC_VER: Mask CAN_FD and security bit
Multiple LX2(LX2160A/LX2162A SoC) personality variants
exists based on CAN-FD and security bit in SVR.
Currenly SVR_SOC_VER mask only security bit.
Update SVR_SOC_VER to mask CAN_FD and security bit
for LX2 products.
Signed-off-by: Wasim Khan <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/soc.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index b24f38cac90..887954eaa52 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017-2020 NXP + * Copyright 2017-2021 NXP * Copyright 2015 Freescale Semiconductor */ @@ -113,10 +113,13 @@ enum boot_src get_boot_src(void); #define SVR_MAJ(svr) (((svr) >> 4) & 0xf) #define SVR_MIN(svr) (((svr) >> 0) & 0xf) #define SVR_REV(svr) (((svr) >> 0) & 0xff) -#define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E) #define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1)) #if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A) #define IS_C_PROCESSOR(svr) (!((svr >> 12) & 0x1)) +#define SVR_WO_CE 0xFFFFEE +#define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_CE) +#else +#define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E) #endif #ifdef CONFIG_ARCH_LS1028A #define IS_MULTIMEDIA_EN(svr) (!((svr >> 10) & 0x1)) |