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authorJonas Karlman <[email protected]>2023-05-17 18:26:34 +0000
committerKever Yang <[email protected]>2023-05-18 08:44:04 +0800
commit674803fe869761997c43b6e2c99b63a3444ac6fa (patch)
tree18159600c91326e585efdf53eb38a75636d522de
parent68000f750acdaea18fbf87b81ff9d1a65b379fd5 (diff)
rockchip: rk3568-rock-3a: Use pinctrl for sdmmc and sdhci in SPL
Enable pinctrl for sdmmc and sdhci in SPL to support loading of FIT image from SD and eMMC storage when booting from SPI NOR flash. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
-rw-r--r--arch/arm/dts/rk3568-rock-3a-u-boot.dtsi52
-rw-r--r--configs/rock-3a-rk3568_defconfig3
2 files changed, 54 insertions, 1 deletions
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
index c7855135906..8cccd7e2265 100644
--- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
@@ -12,6 +12,54 @@
};
};
+&emmc_bus8 {
+ bootph-all;
+};
+
+&emmc_clk {
+ bootph-all;
+};
+
+&emmc_cmd {
+ bootph-all;
+};
+
+&emmc_datastrobe {
+ bootph-all;
+};
+
+&pinctrl {
+ bootph-all;
+};
+
+&pcfg_pull_none {
+ bootph-all;
+};
+
+&pcfg_pull_up_drv_level_2 {
+ bootph-all;
+};
+
+&pcfg_pull_up {
+ bootph-all;
+};
+
+&sdmmc0_bus4 {
+ bootph-all;
+};
+
+&sdmmc0_clk {
+ bootph-all;
+};
+
+&sdmmc0_cmd {
+ bootph-all;
+};
+
+&sdmmc0_det {
+ bootph-all;
+};
+
&sdhci {
cap-mmc-highspeed;
mmc-ddr-1_8v;
@@ -28,6 +76,10 @@
status = "disabled";
};
+&uart2m0_xfer {
+ bootph-all;
+};
+
&uart2 {
clock-frequency = <24000000>;
bootph-all;
diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig
index 5126feb6b11..2e556dc2c1a 100644
--- a/configs/rock-3a-rk3568_defconfig
+++ b/configs/rock-3a-rk3568_defconfig
@@ -46,7 +46,7 @@ CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
@@ -63,6 +63,7 @@ CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_RK8XX=y