diff options
| author | Marek Vasut <[email protected]> | 2023-09-21 20:44:19 +0200 |
|---|---|---|
| committer | Stefano Babic <[email protected]> | 2023-10-16 16:25:10 +0200 |
| commit | 68e0d92d33804b89973a215ae4ee212ecae7f4ea (patch) | |
| tree | bcd5c1594dc8540d4e7568492fa5182edf43ab58 | |
| parent | 9de599ec3d599c1b2bcf381213e48da0103e2afd (diff) | |
arm64: dts: imx8mp: Drop i.MX8MP DHCOM rev.100 PHY address workaround from PDK3 DT
In case the i.MX8MP DHCOM rev.100 has been populated on the PDK3
carrier board, the on-SoM PHY PHYAD1 signal has been pulled high
by the carrier board and changed the PHY MDIO address from 5 to 7.
This has been fixed on production rev.200 SoM by additional buffer
on the SoM PHYAD/LED signals, remove the workaround.
Signed-off-by: Marek Vasut <[email protected]>
| -rw-r--r-- | arch/arm/dts/imx8mp-dhcom-pdk3.dts | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3.dts b/arch/arm/dts/imx8mp-dhcom-pdk3.dts index c5f0607f43b..867d238f2b5 100644 --- a/arch/arm/dts/imx8mp-dhcom-pdk3.dts +++ b/arch/arm/dts/imx8mp-dhcom-pdk3.dts @@ -227,10 +227,6 @@ }; }; -ðphy0g { - reg = <7>; -}; - &fec { /* Second ethernet */ pinctrl-0 = <&pinctrl_fec_rgmii>; phy-handle = <ðphypdk>; |