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authorSvyatoslav Ryhel <[email protected]>2025-04-03 10:52:51 +0300
committerSvyatoslav Ryhel <[email protected]>2025-04-12 11:12:06 +0300
commit69dffab9416c45f0341675aafd2c84e11df2d749 (patch)
treea8f4d35d7c003628e126238c719042065db7a749
parent9ee12daa591b8adefa8ae221295a85e2ee467742 (diff)
ARM: tegra114: clock: avoid touching DISP clocks on init
The clock initialization routine sets the DISP* clock parent to PLLC, resulting in DC failure in the case when PLLD was previously configured. This issue disrupts chainloading and to prevent failures caused by DISP* clock parent conflicts, clock initialization should not modify DISP*. The DC driver handles DISP* configuration. Signed-off-by: Svyatoslav Ryhel <[email protected]>
-rw-r--r--arch/arm/mach-tegra/tegra114/clock.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c
index d5cc8ac44dd..d67d808b724 100644
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -796,7 +796,6 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
{ PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
- { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
{ PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },